An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a lower substrate including a display area and a non-display area surrounding the display area, wherein a plurality of pixels are formed in the display area. The OLED display also includes an embedded circuit formed in the configured to apply a plurality of signals to the pixels, and an initialization wiring formed in the non-display area and configured to apply an initialization voltage to each of the pixels. The initialization circuit is formed in a layer so as to at least partially overlap with the area of the embedded circuit.

A display apparatus according to the present disclosure includes: a pixel array unit, pixels being arranged in the pixel unit, the pixels each including a driving transistor that includes a plurality of gate electrodes and drives a light emitting unit in response to a video signal applied to one gate electrode of the plurality of gate electrodes; and a control unit that controls gate voltage of a different gate electrode of the driving transistor. Further, an electronic apparatus according to the present disclosure includes the display apparatus having the above-mentioned configuration.

A display module is provided. In the display module, a liquid crystal display panel has a plurality of display subareas. A color backlight module has a plurality of backlight subareas in a one-to-one correspondence to the plurality of display subareas. A driving apparatus may sequentially drive liquid crystal molecules in the display subareas to turn over, and after driving the liquid crystal molecules in each display subarea to turn over, drive a light-emitting element of one color included in each backlight source in one corresponding backlight subarea to emit light.

Disclosed are a display panel, a driving method therefor, a display device. The display panel includes pixel circuits, data lines, write control lines, compensation control lines, a first driving circuit connected to compensation control lines, a second driving circuit connected to write control lines. Each column of pixel circuits corresponds to one data line, each row of pixel circuits corresponds to one write control line, one compensation control line. The first driving circuit outputs compensation control signals to pixel circuits by compensation control lines, second driving circuit outputs write control signals to pixel circuits by write control lines. The pulse width of compensation control signals is N times pulse width of write control signals, write control signals on two adjacent write control lines do not overlap, an overlap time of compensation control signals on two adjacent compensation control lines is (N-1)/N of pulse width of compensation control signals.

A display system includes (i) a plurality of picture elements supported on a single semiconductor substrate and (ii) a backplane including electronic circuitry supported thereon and electronically connected with the picture elements. Each picture element includes a light steering optical element and an array of light emitting elements. The array of light emitting elements includes a first set, a second set, and a third set of inorganic LEDs that (i) are monolithically integrated on the single semiconductor substrate and (ii) emit, respectively, light at a first, a second, and a third wavelength, which are mutually distinct. The light steering optical element is configured for steering the light from the first set, second set, and third set of LEDs in a predetermined direction. The electronic circuitry is configured for individually driving each light emitting element of the array of light emitting elements.

A scan driver includes stages, each of the stages receiving first and second clock signals having a first low level as an active level, and a third clock signal having a high level as the active level. Each of the stages includes a logic circuit that changes a voltage of a first node to the first low level based on an input signal and the first clock signal, and changes a voltage of the first node to a second low level lower than the first low level based on the second clock signal, a first output buffer that outputs, as an active-low scan signal, the second clock signal in response to the voltage of the first node, and a second output buffer that outputs, as an active-high scan signal, the third clock signal in response to the voltage of the first node.

A display device includes: a timing controlling part generating an image data, a data control signal and a gate control signal; a data driving part generating a data voltage using the image data and the data control signal; a gamma part transmitting the data voltage corresponding to the image data; a gate driving part generating a gate voltage using the gate control signal; a display panel including subpixels, gate lines, left data lines at a left side of the subpixels and right data lines at a right side of the subpixels; and first MUX switches, second MUX switches, third MUX switches, fourth MUX switches, fifth MUX switches and sixth MUX switches sequentially transmitting the data voltage to the left data lines and the right data lines.

A video play system, a video play device, and a video play method are provided. The video play system includes: a display module and a plurality of play modules electrically connected to the display module. The plurality of play modules individually decode and transcode a video source having first resolution to generate target video data, and simultaneously output the target video data generated themselves to the display module. The display module plays a video image having second resolution according to multiple channels of the target video data.

A display panel includes a base substrate. A semiconductor layer is disposed on the base substrate. A source electrode and a drain electrode are disposed on the semiconductor layer. A first insulating layer is disposed on both the source electrode and the drain electrode. A data line is disposed on the first insulating layer. The data line is electrically connected to the source electrode via a contact hole penetrating through the first insulating layer.

Disclosed is a display method of a display panel. The display panel includes two display screens arranged opposite to each other, and the display method of the display panel includes: acquiring a liquid crystal response duration of each display screen upon receiving image information to be displayed; taking a display screen having a shorter liquid crystal response duration as a first display screen, and taking a display screen having a longer liquid crystal response duration as a second display screen; and driving the second display screen to display, and delaying to drive the first display screen to display. A display device and a display panel are also disclosed. The display panel of the present application has a good display effect.