The present invention provides an operating method of a display device. An example operating method includes driving each pixel for each frame, wherein a plurality of pixels of the display device are disposed in an array of rows and columns, a period of one frame comprises one or more data sections and one or more off-sections, ratios of time length of the one or more data sections are substantially the same as a sequence of powers of 2, each of the one or more data sections corresponds to an ON period or an OFF period related to a specified brightness, grey scale color, or luminance, and each of the one or more off-sections corresponds to the OFF period unrelated to the specified brightness, grey scale color, or luminance.

The present application discloses a pixel circuit of a photo detector panel. The pixel circuit includes a reset sub-circuit for resetting voltages at a first node and a second node, a photoelectric-conversion sub-circuit coupled to the first node and configured to convert an optical signal to a first voltage at the first node, a compensation sub-circuit coupled between the first node and the second node and configured to store the first voltage and determine a second voltage at the second node. The pixel circuit further includes an integration sub-circuit coupled to the first node and to determine a third voltage at the second node to be applied to a gate of a driving transistor to generate a current flowing from an input port provided with a bias voltage to an output port. The current is substantially independent from a threshold voltage of the driving transistor and the bias voltage.

Display panel, light sensing detection method thereof and display device are provided. The display panel includes a plurality of light sensing detection units. A light sensing detection unit of the plurality of light sensing detection units includes a light sensing detection circuit. The light sensing detection circuit corresponding to a same light sensing detection unit includes N light sensing detection branches connected in parallel, a light sensing detection branch of the N light sensing detection branches includes a storage capacitor, and N≥2. The N light sensing detection branches include a first light sensing detection branch and a second light sensing detection branch. The storage capacitor includes a first storage capacitor located in the first light sensing detection branch and a second storage capacitor located in the second light sensing detection branch. A capacitance of the first storage capacitor is greater than a capacitance of the second storage capacitor.

A shift register unit, a circuit structure, a gate drive circuit, a drive circuit and a display device are provided. A shift register unit includes a substrate and an input circuit, a reset circuit, a first output circuit, a first output terminal, a first connection conductive portion connecting both the input circuit and the reset circuit, a second connection conductive portion connecting both the reset circuit and the first output circuit, and a third connection conductive portion connecting both the first output circuit and the first output terminal, all of which are on the substrate.

A display panel and a display device are provided. The display panel includes pixel circuits. Each pixel circuit includes a driving transistor, a data writing circuit, a light-emitting control circuit, a threshold compensation circuit and a bias adjustment circuit. The driving transistor includes a gate electrically connected to a first node, a first terminal electrically connected to a second node, and a second terminal electrically connected to the third node, and is configured to generate a driving current. The third node is connected to a light-emitting element through the light-emitting control circuit. The bias adjustment circuit is configured to provide a signal of a bias adjustment signal terminal to the second node under control of a signal of a first scanning signal terminal in such a manner that a bias state of the driving transistor is adjusted.

A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit and the second input circuit have a same circuit structure.

An electroluminescence display apparatus includes a display panel, including a pixel including a driving element and a light emitting device, and a panel driving circuit supplying the pixel with a first data voltage for a display driving operation and a display scan signal synchronized with the first data voltage in a vertical active period succeeding a first vertical blank period and maintaining the first data voltage in the pixel during a second vertical blank period succeeding the vertical active period, wherein a length of the first vertical blank period is fixed regardless of a variation of a frame frequency, and a length of the second vertical blank period varies based on the variation of the frame frequency.

A display substrate and a display device are disclosed. The display substrate includes a base substrate and a plurality of shift register units; each of the plurality of shift register units includes an input circuit, an output circuit, a first reset circuit and a frame reset signal connection wire; the frame reset signal connection wire and is configured to provide a frame reset signal to the first reset circuit; the first reset circuit is configured to respond to the frame reset signal, so as to reset a first node and an output end within a time period between two display frames of the display substrate; the first reset circuit includes a first transistor and a second transistor, and the frame reset signal connection wire, a gate of the first transistor and a gate of the second transistor are provided on a first conductive layer.

The application provides a gamma correction method for a display panel, a gamma correction apparatus, and a display apparatus. According to whether a refresh rate of an image signal exceeds a predetermined refresh rate, choosing to use a different gamma correction curve. Therefore, when the display panel is switched from a high refresh rate to a low refresh rate, the display brightness of the display panel can be quickly adjusted, that is, the display brightness of the display panel can keep constant to avoid flicker phenomenon, and the storing space of the register is saved.

A gate driver on array (GOA) circuit and a display panel are provided. The GOA circuit includes a plurality of cascaded GOA units. The GOA units include a first GOA unit and a second GOA unit. By setting a virtual reset module in the second GOA unit, and the virtual reset module corresponding to the reset module in the first GOA unit, a difference between the first GOA unit and the second GOA unit is reduced and stability of the GOA circuit is improved.