A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

A method for driving a display having at least one display pixel is provided, the method may include applying a waveform to the at least one display pixel, maintaining a floating state on the display pixel, and shorting the display pixel.

A display pixel including at least one light-emitting diode, a circuit for driving the light-emitting diode, and first, second, third, and fourth conductive pads. The driver circuit is powered with a first power supply voltage received between the first and second pads. The light-emitting diode is powered with a first binary signal, received between the third and second pads, and alternating between a second power supply voltage, greater than the first voltage, and a third voltage, smaller than the first voltage. The driver circuit is configured to determine a digital signal based on the values of a second binary signal on the fourth pad received during each of first pulses of the first binary signal at the third voltage and to control the light-emitting diode from the digital signal.

A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

Provided is an electroluminescence display comprising a display panel where a plurality of pixels connected to a plurality of data lines and a plurality of gate lines are arranged. Each pixel comprises: a driving TFT that controls the current in a light-emitting element EL in response to a data voltage applied to a gate; and switching TFTs that supply a high-level power supply voltage to the driving TFT in response to a gate-on voltage of an emission signal and control signals applied to the source and drain of the driving TFT. The electroluminescence display switches between first and second modes, the first mode being a mode in which data writing and driving TFT characteristic compensation are performed within 1 horizontal period 1H by applying a data voltage to the gate of the driving TFT, and the second mode being a mode in which data writing is performed within the 1 horizontal period by applying an initial voltage to the gate of the driving TFT and applying the data voltage upon completion of the compensation of the driving TFT characteristics.

Provided is a display device which makes less flicker perceived in transition from a pause period to a drive period by suppressing image luminance from changing.

Regardless of whether the number of pause frames in an immediately preceding pause period is high, or whether there is an image change immediately after a transition from the pause period to a drive period, high-speed scans are performed from Operating Frame One through Operating Frame Three, and BC drive is performed during Operating Frames One and Two. As a result, image luminance change immediately after the transition from the pause period to the drive period can be suppressed in a short period of time, and therefore, the occurrence of flicker as perceived by the viewer can be suppressed. Moreover, high-speed scans are performed only from Operating Frame One through Operating Frame Three, and therefore, power consumption in a liquid crystal display device 1 can be reduced.

In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

Provided is a driving circuit for a touch display apparatus. The driving circuit includes: a main control unit, providing image data for image display at a first speed; a driving unit, receiving the image data and sending display data to the touch display apparatus according to the received image data; a data buffering module, disposed in the driving unit, sending the display data at a second speed higher than the first speed, and forming, due to the difference between the second speed and the first speed, a pause time for stopping sending the display data to the touch display apparatus during the process that the main control unit provides the image data; and a touch detection unit, performing touch detection of the touch display apparatus in the pause time.

A driving method for reducing a ghosting in an electrophoretic display is provided without prolonging driving waveform time and scintillation by improving a driving waveform design. The method comprises four steps: erasing an original image (S1); activating activity of electrophoretic particle (S2); activating electrophoretic particle (S3); and writing a new image (S4). At the electrophoretic particle activating (S3) stage, the electrophoretic particle activating is carried out for a preset duration time (t.sub.x), wherein the voltage of the driving waveform is 0V within the preset duration time (t.sub.x).

A dimming device according to the present disclosure includes a dimming panel. The dimming panel includes a dimming layer, a plurality of column electrodes, and a plurality of row electrodes. The dimming layer has a plurality of regions partitioned in a matrix. The column electrodes are arranged in a row direction along a front surface of the dimming layer. Each of the column electrodes extends in a column direction. The row electrodes face the column electrodes with the plurality of regions interposed therebetween and are arranged in the column direction along a back surface of the dimming layer. Each of the row electrodes extends in the row direction. Voltages having substantially the same waveform are supplied to a column electrode and a row electrode corresponding to a region of the regions controlled to a predetermined transmittance, among the column electrodes and the row electrodes.