An organic light emitting display device, a pixel circuit of the organic light emitting display device and a method of driving the same are disclosed. The pixel circuit comprises a driving transistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, a second capacitor, a light emitting diode and a compensating diode. The degradation of the light emitting diode is compensated by the compensating diode. Since the degradation phenomena of the light emitting diode is compensated by the compensating diode, the light emitting diode is able to maintain an effective and normal brightness while using the same driving voltage, thereby ensuring higher display quality of images and scenes of the organic light emitting display device.

A light emitting diode (LED) display can calculate a common voltage charge of a line of pixels in the LED display, the common voltage charge comprising a difference between a first line of pixels and a second line of pixels. If the calculated common voltage charge exceeds a predetermined threshold, a toggle matrix can be generated for the line of pixels. The toggle matrix can include a matrix of charge values generated by calculating a difference in charge values for each subpixel a first line of subpixels with each subpixel a second line of subpixels. The LED display can identify one or more regions of subpixels exhibiting the predetermined toggle pattern in the toggle matrix. The LED display can generate a voltage correction charge to apply to affected regions of the display. Alternatively, the subpixels or pixels could be swapped with adjacent pixels to reduce toggling or settling error.

A display panel includes a first substrate and a second substrate. The first substrate includes a plurality of pixel electrodes to which pixel voltages are applied and a shield electrode disposed between the pixel electrodes. A shield voltage is applied to the shield electrode. The second substrate faces the first substrate. The second substrate includes a common electrode to which a common voltage is applied.

Methods for driving an electro-optic display having a plurality of display pixels and each of the plurality of display pixels is associated with a display transistor, the method includes applying a first voltage to a transistor associated with a display pixel for a first duration of time to drain remnant voltages from the display pixel, applying a second voltage to the transistor for a second duration of time to stop the draining of remnant voltages from the display pixel, and applying a third voltage to the transistor for a third duration of time to drain remnant voltages from the display pixel.

According to the array substrate provided by this disclosure, in a row of sub-pixels, sub-pixels in the odd columns and even columns are separately coupled to different gate lines, i.e., making the sub-pixels coupled to the same gate line are not adjacent to each other. In this way, during row scanning drive, an up-down twist charging may be implemented, and the sub-pixels cause no interference to each other.

This disclosure relates to a DC-DC conversion control module, a DC-DC converter, and a display device. The DC-DC conversion control module includes a voltage input terminal, a control voltage output terminal, and a control sub-module; the control sub-module includes a delay unit, a switch unit, and an output control unit; the delay unit is configured to output a trigger signal after delaying for a time length; the switch unit is configured to, when receiving the trigger signal, make the path between the voltage input terminal and the input terminal of the output control unit be conducted; and the output control unit is configured to output a control voltage. Embodiments of the disclosure can realize adjustable delaying with respect to the output voltage of the DC-DC converter.

In a data line driver, successively input image data are sequentially stored in a first data storage unit and a second data storage unit. A subtracter calculates a difference value between the image data stored in the first data storage unit and the image data stored in the second data storage unit. A timing pulse generator generates a timing pulse based on the calculated difference value, and a charge supply circuit supplies a charge to a gradation voltage output terminal in accordance with the timing pulse. The rising and falling characteristics of gradation voltage when the image data is changed are improved in this way.

An array substrate, a display panel and a driving method thereof. The array substrate includes a plurality of right-angled triangular subpixels. Each subpixel and another adjacent subpixel form a corresponding rectangular virtual pixel, and the plurality of subpixels form a plurality of virtual pixels arranged in an array. Every four adjacent subpixels which belong to different virtual pixels respectively form a corresponding diamond-shaped physical pixel.

Disclosed are a driving circuit for a display panel, a display module, a compensation method of the display module, and a display device. According to the present disclosure, a TCON circuit board provided with a plurality of sets of reference voltage outputs is used to independently input a reference voltage to each driver chip through a corresponding set of reference voltage input lines, that is, each driver chip receives an independent reference voltage signal, in this way, the reference voltages output by the TCON circuit board corresponding to each driver chip can be adjusted, the reference voltages received by all driver chips are made to be the same voltages.

A display substrate and a manufacturing method thereof, and a compensating method for wire load are provided. The display substrate includes a display region and a peripheral region. The display region has an opening, and the peripheral region includes an opening peripheral region at least partially in the opening; at least one wire is provided in the display region and the opening peripheral region. Each of the at least one wire includes two portions, a first portion is spaced apart and insulated from the semiconductor pattern and the conductive pattern, to provide at least one first compensation unit, and a second portion is spaced apart and insulated from one of the semiconductor pattern and the conductive pattern, to provide at least one second compensation unit.