A pixel compensation method includes: detecting driving transistors of pixels to obtain present characteristic values of the driving transistors of the pixels; extracting historical compensation characteristic values of the driving transistors of the pixels obtained in a previous display cycle of a screen; calculating a present compensation characteristic value of at least one driving transistor of the pixels according to a present characteristic value and a historical compensation characteristic value corresponding to the driving transistor of the pixels; and compensating a corresponding pixel according to the present compensation characteristic value of the driving transistor of the pixels.

A method of driving a display panel and display device including the same are disclosed. In one aspect, the method comprises providing input image data, generating a gamma reference voltage, generating a data voltage based on the gamma reference voltage and input image data, providing the data voltage to the display panel, and determining whether the input image data represents a still image or a video image. The method further comprises substantially periodically and alternately generating first and second common voltages when the input image data represents the still image, and providing the first and second common voltages to the display panel.

A pixel driving circuit, a driving method and an organic light-emitting display panel are provided. The pixel driving circuit includes: a first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor, a sixth transistor, a seventh transistor and an eighth transistors, and a capacitor. A first node is present between the fourth transistor and the fifth transistor. The seventh transistor is coupled between a reference voltage line and the first node, and the eighth transistor is coupled between the reference voltage line and an anode of the light-emitting element.

Based on a REF/NREF signal coming from a REF/NREF determination circuit, a polarity bias calculation circuit updates a polarity bias count value Nb indicating a degree of a polarity bias of an applied voltage to a liquid crystal layer, and based on this polarity bias count value Nb, a bias movement determination circuit determines a moving direction of the polarity bias. Upon receiving an OFF signal Soff instructing OFF of the power supply, a balance control circuit controls a drive unit based on a result of the determination of the polarity bias moving direction and on the polarity bias count value Nb at a point of time when the OFF signal Soff is inputted so that the polarity bias can be resolved before a power supply is turned off.

A display apparatus includes a display unit, a source driver, a gate driver and a compensation unit. The display unit includes at least a pixel unit. Each pixel unit includes a first transistor, a second transistor, a first capacitor, a second capacitor and an organic light emitting diode. When the pixel unit is operated in a display mode, the pixel unit outputs a sensing voltage including a first parameter having characteristics of the second transistor and a second parameter having characteristics of the organic light emitting diode. The source driver receives a compensation data and accordingly adjusts the next display data. The compensation unit is disposed between the second capacitor and the source driver and electrically coupled between the second end of the second capacitor and the source driver. The compensation unit receives the sensing voltage and outputs the compensation data according to the received sensing voltage.

Systems, methods, and device are provided to provide inversion techniques for dynamic variable refresh rate electronic displays. One embodiment of the present disclosure describes An electronic display including a display panel that display images with varying refresh rates and a timing controller that receives image data from an image source, determines a counter value, and instructs a driver in the electronic display to apply a voltage to the display panel to write an image on the display panel, in which a negative voltage is applied when the counter value is positive and a positive voltage is applied when the counter value is less than or equal to zero. Additionally, the timing controller update the counter value based at least in part on duration the image is displayed on the display panel, wherein the counter value increases when the voltage is positive and decreases when the voltage is negative.

The present invention is directed to driving methods for a color display device which can display high quality color states. The display device utilizes an electrophoretic fluid which comprises three types of pigment particles having different optical characteristics, and provides for displaying at a viewing surface not only the colors of the three types of particles but also the colors of binary mixtures thereof

A method for driving an electro-optic display having a front electrode, a backplane and a display medium positioned between the front electrode and the backplane, the method comprising of applying a first driving phase to the display medium, the first driving phase having a first signal and a second signal, the first signal having a first polarity, a first amplitude as a function of time, and a first duration, the second signal succeeding the first signal and having a second polarity opposite to the first polarity, a second amplitude as a function of time, and a second duration, such that the sum of the first amplitude as a function of time integrated over the first duration and the second amplitude as a function of time integrated over the second duration produces a first impulse offset. The method further comprising applying a second driving phase to the display medium, the second driving phase produces a second impulse offset, wherein the sum of the first and second impulse offset is substantially zero

A system for offset cancellation for driving a display panel includes: a plurality of source amplifiers driving the display panel; an image analyzer configured to receive a data input of an image frame and analyze the data input; and a chopping pattern controller connected with the image analyzer and configured to determine a chopping pattern that fits the data input based on analysis results of the image analyzer, and apply the determined chopping pattern to the source amplifiers. The source amplifiers are divided into N groups while the chopping pattern controller is configured to drive source amplifiers in each group by a single chopping control signal. The image analyzer is configured to generate an indicator that indicates whether image data being analyzed corresponds to a general image or one of pre-registered killer pattern images. A method for offset cancellation for driving a display panel is also provided.

The present invention discloses a Mura offset data input device, including a Mura offset chip, a first memory unit, a second memory unit, a connector and a control circuit, the Mura offset chip is connected to the first memory unit, the second memory unit and the connector, the connector and the first memory unit are connected, the connector and the second memory unit are connected by the control circuit, the first memory unit and the second memory unit both include two operative modes—an editable mode and a read-only mode, the control circuit is applied to control the first memory unit and the second memory unit that are in different modes, the connector is applied to transfer first data to the first memory unit when the first memory unit is editable, and transfer second data to the second memory unit by the Mura offset chip.