Disclosed is a display device comprising: a display panel on which a plurality of pixels of different colors are arrayed; a power supply configured to supply a high-potential driving voltage to the display panel; and a data driver configured to calculate an average picture level of input image data, and generate a data voltage based on a compensation value for compensating for a voltage drop of the high-potential driving voltage based on the calculated APL, wherein the compensation value is independently set for each of the colors.

A display device includes: a substrate including a display area including first and second pixels in a first row, and third and fourth pixels arranged in a second row parallel to the first row; a light-transmitting non-display area within the display area; first and second columns parallel to and spaced apart from each other, and each crossing the non-display area; and a plurality of lines including: first and second lines extending along the first row and connected to the first and second pixels, respectively, a first disconnection point where the first and second lines are spaced apart from each other, third and fourth lines extending along the second row and connected to the third and fourth pixels, respectively, and a second disconnection point where the third and fourth lines are spaced apart from each other, where the first and second disconnection points respectively correspond to the first and second columns.

A display device includes: a substrate including a first pixel region, at least one second pixel region having a smaller area than the first pixel region, the at least one second pixel region being disposed adjacent to the first pixel region, and a peripheral region surrounding the first pixel region and the second pixel region; first and second pixels respectively provided in the first and second pixel regions; first and second lines respectively connected to the first and second pixels; a dummy line connected to one of the first and second lines to extend to the peripheral region; and a first dummy part including a dummy pixel connected to the dummy line in the peripheral region.

The present application provides a display panel. The display panel includes: gate driver on array (GOA) units arranged along a first direction; clock signal lines arranged along a second direction and arranged at one side of the GOA units; the connection lines, each of the connection lines being extended along the second direction and connected between the corresponding clock signal line and the corresponding GOA units; and a first electrode arranged at one side of the GOA units, the clock signal lines, and the connection lines. The first electrode includes an opening, and the opening is arranged corresponding to at least one of the clock signal lines and/or at least one of the connection lines.

According to one embodiment, a display device includes a first substrate, a second substrate including a common electrode, and a display function layer which is partly switched between a transparent state and a scattering state. The first substrate includes a first scanning line, a first signal line, an insulating layer, a first switching element, and a first pixel electrode. The first signal line includes a first coupling portion and a first line portion. The first scanning line intersects the first coupling portion and is provided in a same layer as the first line portion. The insulating layer is interposed between the first coupling portion and the first scanning line.

A display module including: a module substrate; a plurality of pixels provided on the module substrate; and a plurality of micro pixel controllers provided in spaces between the plurality of pixels, and configured to supply driving current to at least two pixels of the plurality of pixels, wherein each micro pixel controller of the plurality of micro pixel controllers includes a plurality of pixel circuits configured to, based on a first voltage and a second voltage being applied to the micro controller, control an amplitude of the driving current based on the first voltage and control a pulse width of the driving current based on the second voltage, and, based on the display module being in a power saving mode, the first voltage is adjusted to decrease a brightness of the plurality of pixels.

A display apparatus includes a display panel including a first surface including first pixels and a second surface including second pixels, the first surface contacting the second surface at a panel center thereof, a first source integrated circuit (IC) sequentially latching first image data, which is to be applied to the first surface, in a first direction facing the panel center at a panel edge of the first surface, and a second source IC sequentially latching second image data, which is to be applied to the second surface, in a second direction facing the panel center at a panel edge of the second surface, wherein the first direction is opposite to the second direction.

Disclosed is a display panel including a base substrate (101), and a gate drive circuit (40), a plurality of clock signal lines, and a plurality of connecting lines (51) that are disposed on the base substrate (101). The plurality of clock signal lines are located on a side of the gate drive circuit (40) along a first direction (X) and are arranged in sequence. Each connecting line (51) is electrically connected with the gate drive circuit (40) and a clock signal line. At least one connecting line (51) includes a load adjusting portion (512) configured to compensate for a load difference between different clock signal lines. An orthographic projection of the load adjusting portion (512) of the at least one connecting line (51) on the base substrate (101) is at least partially overlapped with an orthographic projection of at least one clock signal line on the base substrate (101).

An array substrate and a method for forming the array substrate, a display panel and a display device are provided in the present disclosure. The array substrate includes: a base substrate, a first electrode layer, a first insulating layer and a second electrode layer arranged sequentially on the base substrate, a light-emitting element group located on the second electrode layer, where the light-emitting element group includes one or more light-emitting elements, each light-emitting element includes a first electrode, a light emitting layer and a second electrode, the first electrode is coupled to the first electrode layer, and the second electrode is coupled to the second electrode layer, so as to drive the light emitting layer to emit light.

A display apparatus with high display quality is provided. A high-resolution display apparatus is provided. The display apparatus includes a plurality of pixels, and the pixels each include a light-emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, and a first capacitor. One electrode of the light-emitting device is electrically connected to one of a source and a drain of the first transistor, one of a source and a drain of the second transistor, and one electrode of the first capacitor. A gate of the second transistor is electrically connected to the other electrode of the first capacitor, one of a source and a drain of the third transistor, and one of a source and a drain of the fourth transistor. One frame period of each of the pixels includes a period in which the first transistor and the fourth transistor are each in a conduction state.