Patent classifications
G09G2320/0247
Display with Hybrid Oxide Gate Driver Circuitry having Multiple Low Power Supplies
A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a logic sub-circuit and an output buffer sub-circuit. The output buffer sub-circuit may include depletion mode semiconducting oxide transistors with high mobility. The logic sub-circuit may include semiconducting oxide transistors, some of which can be depletion mode transistors and some of which can be enhancement mode transistors with lower mobility. The logic sub-circuit may include at least a carry circuit, a voltage setting circuit, an inverting circuit, a discharge circuit.
Display device
A display device including: pixels coupled to first scan lines, second scan lines, emission control lines, and data lines; a first scan driver configured to supply a first scan signal to each of the first scan lines at a first frequency; a second scan driver configured to supply a second scan signal to each of the second scan lines at a second frequency corresponding to a driving frequency of the pixels; an emission driver configured to supply an emission control signal to each of the emission control lines at the first frequency; a data driver configured to supply a data signal to each of the data lines at the second frequency; and a timing controller configured to control the first scan driver, the second scan driver, the emission driver, and the data driver.
Display device
A display device includes a plurality of pixels. One of the pixels includes a light emitting diode and a driving circuit coupled to the light emitting diode. A display frame period includes at least two emission periods. The light emitting diode emits light according to a data signal including a gray level in each of the at least two emission periods.
Display device with multi-domain method
A display device includes: a first pixel including a first sub-pixel, a second sub-pixel, and a third sub-pixel; and a second pixel including the first sub-pixel, the second sub-pixel, and a fourth sub-pixel. The first pixel and the second pixel are alternately arranged in a row direction and a column direction. The third sub-pixel and the fourth sub-pixel are alternately arranged in the column direction. A branch electrode in one of two first sub-pixels adjacent in the column direction extends in a first direction, and a branch electrode in the other thereof extends in a second direction. A branch electrode in one of two second sub-pixels adjacent in the column direction extends in the first direction, and a branch electrode in the other thereof extends in the second direction. Each branch electrode in the third sub-pixel and the fourth sub-pixel includes a bending portion.
PIXEL CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME
A pixel circuit and a display device including the same are disclosed. The pixel circuit includes a driving element including a first electrode connected to a first node, a first gate electrode connected to a second node, a second electrode connected to a third node, and a second gate electrode to which a preset voltage is applied; a light emitting element including an anode electrode connected to a fourth node and a cathode electrode to which a low-potential power supply voltage is applied; a first switch element connected between the first node and the second node; a second switch element connected between the third node and the fourth node; a first capacitor connected to the first gate electrode of the driving element; and a second capacitor connected to the third node.
INVERTER CIRCUIT, GATE DRIVER USING THE SAME, AND DISPLAY DEVICE
An inverter circuit, a gate driver using the same, and a display device according to an embodiment are discussed. The inverter circuit can include a first transistor connected between a high potential voltage line and a first node; a second transistor having a gate connected to the first node and turned on according to a voltage of the first node to charge a second control node to a high potential voltage of the high potential voltage line; a third transistor having a gate connected to a first control node, a first electrode connected to the first node, and a second electrode connected to the second control node; and a fourth transistor having a gate connected to the first control node, a first electrode connected to the second control node, and a second electrode connected to a low potential voltage line.
Display apparatus
A display apparatus comprises a mirror assembly, a first mirror of the mirror assembly oscillating about a first axis upon excitation by a first excitation signal and the first or a second mirror of the mirror assembly oscillating about a second axis upon excitation by a second excitation signal, a light source projecting a light beam onto the mirror assembly for deflection by the mirror assembly towards an image area, the light source being controlled according to pixels of image frames, a gaze tracker detecting a user's region of interest, ROI, within the image area, and a controller modulating one of the excitation signals by a first modulation signal which is dependent on the ROI detected by the gaze tracker.
DISPLAY PANEL AND DISPLAY DEVICE
A display panel and a display device are provided. The display panel includes a first display area and a second display area; and the second display area includes a transmission area. The sum of the resistivities of a first reset signal line, a first initialization signal line and a first bias adjustment signal line located in the first display area may not be greater than the sum of the resistivities of the second reset signal line, the second initialization signal line and the second bias adjustment signal line located in the second display area such that at least one of the first reset signal line, the first initialization signal line and the first these signal lines with relatively high resistivity requirements is disposed arranged on the film layer with a low signal lines resistivity of the signal line.
Image Display Control Method and Apparatus, and Image Display Device
Disclosed are an image display control method and apparatus, and an image display device. The method includes: a refresh rate of a display screen is acquired; display time of a target image on a predetermined time axis is adjusted according to the refresh rate, so as to obtain adjusted display time, wherein the predetermined time axis is a refresh cycle of each frame of the target image when the display screen is at a target refresh rate; and according to the adjusted display time, the display screen is controlled to display the target image. According to the present disclosure, the technical problem of visual crosstalk when a Light Emitting Diode (LED) display screen displays a dynamic image is solved.
Light Emitting Display Device And Driving Method Thereof
A light emitting display device is disclosed that includes an organic light emitting diode having an anode electrode connected to a first power line and a cathode electrode, a capacitor configured to store a data voltage and having a first electrode and a second electrode, and a driving transistor having a first electrode connected to the cathode electrode of the organic light emitting diode, a gate electrode connected to the first electrode of the capacitor, and a second electrode connected to the second electrode of the capacitor and a second power line. The driving transistor applies an initialization voltage to a node connected to the cathode electrode of the organic light emitting diode and the first electrode of the driving transistor.