In an odd frame, a plurality of scanning lines are selected sequentially, and in one pixel circuit, when a scanning line corresponding to the one pixel circuit is selected, a first selector electrically couples one end of a first capacitance element to a data line, and a second selector electrically couples one end of a second capacitance element to the gate node of a transistor. In an even frame, the plurality of scanning lines are selected sequentially, and when the scanning line is selected, the first selector electrically couples one end of the second capacitance element to the data line, and the second selector electrically couples one end of the first capacitance element to the gate node.

A display device includes: active stages each include a scan output circuit outputting a scan clock signal to a first output terminal and a carry output circuit outputting a carry clock signal to a second output terminal, when a voltage of a first node is at a logic high level. The scan output circuit and carry output circuit output a scan signal of a turn-off level to the first output terminal when a voltage of a second node or a carry signal is at a logic high level. An interval between pulses of the carry clock signal generated during one frame period is the same, and at least two of intervals between pulses of the scan clock signal generated during the one frame period are different from each other.

According to various embodiments of the present disclosure, a system and method for providing fast response time performance with low latency in Liquid Crystal Displays (LCDs) are described. In some embodiments, an Information Handling System (IHS) may include a controller and a memory coupled to the controller, the memory having program instructions stored thereon that, upon execution, cause the controller to receive LCD display capability information from a display device, and determine from the received capability information, that a video stream sent to the display device has a lower frame rate than the capabilities of the display device. Using this information the instructions then increase the frame rate of the video stream by repeating each frame during a current time window of the frame.

It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.

A light emission driver includes a plurality of stages outputs a light emission control signal. Each of the stages includes an input circuit controlling voltages of a first node and a second node, an output circuit supplying a voltage of first power or a second power to an output terminal, a first signal processor controlling a voltage of a fourth node based on a signal supplied to a third input terminal and a voltage of a fifth node, a second signal processor controlling the voltage of the fourth node in response to the voltage of a third node, a first stabilizer limiting voltage drops of the first node and the second node, and a second stabilizer controlling an electrical connection between the third node and the first node in response to the voltage of the fourth node.

The present application discloses a display control device, method and apparatus, and relates to the technical field of displays. The device of the present application comprises: a determination unit for determining a plurality of display point positions having a same display parameter from data to be displayed, the data to be displayed comprising a plurality of display point positions and the display parameter corresponding to each of the display point positions; an acquisition unit for acquiring the display parameter and a plurality of display point positions; and a control unit for controlling the display driving chip to perform a display control operation according to the display parameter at the plurality of display point positions, so that the display driving chip does not need to acquire the data to be displayed in real time during the display control operation.

An electroluminescent display device includes a display panel including a plurality of pixels each including a light-emitting element driven according to a driving current flowing between a high-level power supply voltage and a low-level power supply voltage, and an EVDD adjustment circuit configured to cut off the high-level power supply voltage for a black period in which emission of light from the light-emitting element stops in one frame such that the high-level power supply voltage is not applied to the pixels.

A driving method of the display panel and a driving apparatus are provided. The method includes: during a display period of one frame, acquiring an actual charge grayscale of a pixel unit of an Nth row and a target grayscale of a pixel unit of an N+1th row, wherein the pixel unit of the Nth row and the pixel unit of the N+1th row are connected to a same data line; according to the actual charge grayscale of the pixel unit of the Nth row and the target grayscale of the pixel unit of the N+1 th row, acquiring an over drive grayscale of the pixel unit of the N+1 th row; and driving the pixel unit of the N+1 th row using the over drive grayscale. Thus, the over drive grayscale of the pixel unit of the N+1 th row is more accurate, thereby increasing a charge rate of the pixel unit.

The present invention has a pixel which includes a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.

It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.