Patent classifications
G09G2320/0257
Display device and method for reducing image sticking by shifting pixels
A display device includes a display panel and a driver which receives image signals and transmits data signals to the display panel. The driver includes an image sticking compensator that converts the image signals such that the first image is periodically shifted while being displayed. The image sticking compensator includes an extractor which extracts compensation area data corresponding to a first image displayed in a compensation area, a calculator which calculates fixed data based on the compensation area data and corresponding to the first image, and a shifter which generates shift-fixed data based on the fixed data. The compensation area includes a first area in which the first image is displayed and a second area in which a peripheral image at least partially surrounding the first image is displayed.
ARRAY SUBSTRATE, DISPLAY APPARATUS AND CONTROL METHOD THEREOF
An array substrate has a display area and a bonding region. The display area includes a distal region, a proximal region, and a middle region therebetween. The array substrate includes a base, a common electrode located in the display area, a connecting lead disposed outside the distal region, a conductive frame at least partially surrounding the display area, and at least one first common signal line, at least one second common signal line and at least one third common signal line. The first common signal line, the second common signal line and the third common signal line are respectively coupled to portions of the common electrode located in the distal region, the proximal region and the middle region. The first common signal line is coupled to the connecting lead. The connecting lead and the portion of the common electrode located in the distal region are coupled to the conductive frame.
Liquid crystal display device
The present invention has a pixel which includes a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.
Image correction unit, display device including the same, and method of displaying image of the display device
There is provided a method of displaying an image on a display device, the method including moving an image displayed at an image display region of the display device, and reducing a first region and enlarging a second region, the first and second regions included in the image, wherein the image has a smaller size than the image display region.
Electro-optic displays, and methods for driving same
There are provided methods for driving an electro-optic display having a plurality of display pixels, a such method includes detecting a white-to-white graytone transition on a first pixel; and determining whether a threshold number of cardinal neighbors of the first pixel are not making a graytone transition from white to white, or if the first pixel is a color pixel, and apply a first waveform.
PIXEL CIRCUIT CONFIGURED TO CONTROL LIGHT-EMITTING ELEMENT
A driving transistor is configured to control driving current for the light-emitting element. A first capacitive element and a second capacitive element are connected in series between a gate and a source of the driving transistor. A first switching transistor is configured to switch connection/disconnection between a data line and an intermediate node located between the first capacitive element and the second capacitive element. A second switching transistor is configured to switch connection/disconnection between the gate and a drain of the driving transistor. A third switching transistor is configured to switch connection/disconnection between the intermediate node and a reference power line. A fourth switching transistor is configured to switch supply/non-supply of driving current from the driving transistor to the light-emitting element. A fifth switching transistor is configured to switch connection/disconnection between an anode of the light-emitting element and a reset power line.
DISPLAY DEVICE, METHOD FOR DRIVING A DISPLAY DEVICE, AND DISPLAY DRIVING CIRCUIT
Provided is a method for driving a display device, including n rows of sub-pixels; the method includes: driving the first frame of image, including: performing normal display driving on the n rows of sub-pixels in a display driving period, performing darkness insertion driving on a rows, from the 1.sup.st to a.sup.th rows, of sub-pixels in a first darkness insertion sub-period, and performing darkness insertion driving on (n−a) rows, from the (a+1).sup.th to n.sup.th rows, of sub-pixels in a second darkness insertion sub-period driving a second frame of image, including: performing normal display driving on the n rows of sub-pixels in a display driving period, performing darkness insertion driving on b rows, from the 1.sup.st to b.sup.th rows, of sub-pixels in a first darkness insertion sub-period, and performing darkness insertion driving on (n−b) rows, from the (b+1).sup.th to n.sup.th rows, of sub-pixels in a second darkness insertion sub-period.
DISPLAY DEVICE
A display device, includes: a display panel including a pixel electrically coupled to a gate line and a data line; a gate driver configured to provide a gate signal to the gate line; and a data driver configured to provide a data signal to the data line, wherein the gate driver is configured to sequentially provide a first gate signal and a second gate signal to the gate line during a first frame period, wherein the data driver is configured to provide a first data signal to the data line in response to the first gate signal, and to provide a second data signal to the data line in response to the second gate signal, and wherein the second data signal is different from the first data signal and varies dependent on the first data signal.
Display device and a driving method thereof
A display device including: first and second scan drivers; a data driver; a display unit including pixels connected to first and second scan lines, and data lines; and a controller controlling the first and second scan drivers, and the data driver, a first pixel includes: a light emitting element, a first transistor including a gate connected to a first node, wherein the first transistor is connected between a second node and a third node, a second transistor including a gate connected to a first scan line, the second transistor is connected between a data line and the second node, and a storage capacitor connected between the first node and a first power voltage; the first transistor is reverse biased by a second scan signal applied to a second scan line; and a first scan signal applied to the first scan line is different from the second scan signal.
Clock generator and display device including the same
A display device includes a display unit including gate lines and pixels electrically coupled to the gate lines; a timing controller configured to generate an on-clock signal, an off-clock signal, an enable signal, and a common signal; a clock generator configured to generate a plurality of clock signals having different phases based on the on-clock signal and the off-clock signal, when the enable signal has a first voltage level, wherein the clock generator is to insert a common pulse into each of the plurality of clock signals based on the common signal, when the enable signal has a second voltage level different from the first voltage level; and a gate driver configured to generate gate signals based on the plurality of clock signals, and to sequentially provide the gate signals to the gate lines.