A power voltage generator includes a first sensor, a second sensor, a comparator and a shutdown controller. The first sensor is configured to sense a first power voltage output node that outputs a first power voltage. The second sensor is configured to sense a second power voltage output node that outputs a second power voltage. The comparator is configured to compare a first sensing signal of the first sensor with a second sensing signal of the second sensor. The shutdown controller is configured to shut down the power voltage generator based on a comparison signal from the comparator.

A display device includes a silicon wafer including digital circuits, a micro-light emitting diode (micro-LED) wafer including an array of micro-LEDs, and an indium-gallium-zinc-oxide (IGZO) layer between the silicon wafer and the micro-LED wafer and including analog circuits. The digital circuits are characterized by a first operating supply voltage and are configured to generate digital control signals based on digital display data of an image frame. The analog circuits are characterized by a second operating supply voltage higher than the first operating supply voltage. The analog circuits includes analog storage devices configured to storing analog signals, and transistors controlled by the digital control signals and the analog signals to generate drive currents for driving the array of micro-LEDs. The digital circuits on the silicon wafer or the analog circuits in the IGZO layer include level-shifting circuits at interfaces between the digital circuits and the analog circuits.

A pixel circuit and a display device including the same are disclosed. The pixel circuit includes: a driving element including electrodes respectively connected to a first node to receive a first constant voltage, a second node, and a third node; a light emitting element including an anode connected to a fourth node and a cathode to receive a second constant voltage; a first switch to provide a data voltage to the second node; a second switch to provide a third constant voltage to the second node; a third switch to provide a fourth constant voltage to the fourth node; a fourth switch to provide the first constant voltage to the first node; a fifth switch to electrically connect the third node to the fourth node.

Disclosed is a display device. The display device includes a display panel having a base layer, a circuit element layer disposed on the base layer, a display panel including a plurality of first pixels disposed in a first display area, and a plurality of second pixels disposed in a second display area adjacent to the first display area. The display device further includes a gate driver disposed in the second display area of the display panel and configured to drive the first and second pixels and a diffraction pattern layer including a plurality of second diffraction patterns disposed on the second pixels.

Throttling circuitry may throttle the backlight reconstruction via backlight reconstruction and compensation circuitry in a display pipeline when power may be limited. This throttling of the display pipeline may limit a number of cycles that may be used for performing backlight reconstruction and compensation.

In various implementations, a method of presenting video streams at a head-mountable device (HMD) includes generating a first video stream at a first frame rate for a first display portion. In some implementations, the first frame rate indicates a rate at which frames are presented by the first display portion. In various implementations, the method includes generating a second video stream at a second frame rate for a second display portion. In some implementations, the second frame rate indicates a rate at which frames are presented by the second display portion. In some implementations, the second frame rate is within a threshold relative to the first frame rate. In various implementations, the method includes temporally shifting the second video stream relative to the first video stream so that a majority of refresh times of the first display portion are different from refresh times of the second display portion.

A pixel circuit, a driving method therefor, and a display device. The pixel circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a storage capacitor, and a light-emitting device. The pixel circuit can avoid the influence of drifting of a threshold voltage on brightness uniformity and constancy of a display.

A pixel circuit, a driving method for the pixel circuit, a display panel, and a display device, the pixel circuit includes a selecting module (01), a writing module (02), a driving module (03), and a light emitting element (OLED). When a high-luminance picture needs to be displayed, the selecting module (01) outputs the signal from the first power supply signal terminal (VDDH) to the second node (P2), so that the signal from the first power supply signal terminal (VDDH) drives the light emitting element (OLED) to emit light; when a low-luminance picture is to be displayed, the selecting module (01) outputs a signal from the second power supply signal terminal (VDDL) to the second node (P2), so that the signal from the second power source signal (VDDL) drives the light emitting element to emit light.

A display device according to example embodiments includes an image analyzer configured to calculate contrast and load of an image of a frame based on R, G, and B image data input corresponding to the frame, an image processor configured to control a peak control coefficient applied to W image data to adaptively control peak luminance based on the contrast and the load, and to respectively generate R′, G′, and B′ image data by subtracting a product of the W image data and the peak control coefficient from each of the R, G, and B image data, a display panel including a plurality of pixels, a data driver configured to generate a data signal based on the R′, G′, B, and W image data, and to provide the data signal to the display panel, and a scan driver configured to provide a scan signal to the display panel.

Devices and methods for improving image quality and decreasing power consumption of an electronic display are provided. The electronic device includes a display panel including a plurality of pixels configured to display an image, and to operate at multiple refresh rates. The electronic device also includes a processor configured to instruct the display panel to transition between the multiple refresh rates based at least in part on a blur effective width of the image.