The present disclosure provides a liquid crystal display panel and a driving method thereof. The liquid crystal display panel includes a common electrode, a plurality of common electrode lines, a plurality of data lines, and a plurality of gate lines, and at least a part of the data lines overlap with the common electrode and/or the common electrode line. The plurality of data lines are divided into at least two groups. The driving method includes: starting to supply, to the data lines in different groups, data signals corresponding to a gate line at different time points after the gate line is enabled.

Methods and apparatus relating to programmable power performance optimization for graphics cores are described. In one embodiment, the first frame of a scene is analyzed. It is then determined whether to optimize one or more operations, to be performed on one or more frames of the scene, based on the second frame of the scene and an idle status of one or more subsystems of a processor. And, one or more optimization operations are performed on a third frame of the scene based on the determination of whether to optimize the one or more operations. Other embodiments are also disclosed and claimed.

Provided is a display device. According to one embodiment, the display device includes: a backlight unit with a plurality of light emitting strings including at least one light emitting diode; and a display panel displaying an image using light outputted from the backlight unit, wherein the backlight unit includes: a light source unit including the plurality of light emitting strings and a plurality of photo transistors controlling the plurality of light emitting strings; a DC-DC converter outputting the driving voltage to the light source unit; and a driving control unit applying activated gate voltages to turn on the plurality of photo transistors and detecting driving time differences between an output time for outputting the driving voltage and applying times for applying the gate voltages.

Driving methods and display systems are described for operating a display panel in flash mode. In an embodiment, the driving method includes time multiplexing between at least two panel operation voltage (V.sub.OP) levels including a first V.sub.OP level and a second V.sub.OP level across all Vdd input lines to a display area, and emitting a first wavelength range from a first subpixel group during application of the first V.sub.OP level across all of the Vdd input lines and emitting a second wavelength range from a second subpixel group during application of the second V.sub.OP level across all of the Vdd input lines.

The present invention provides a GOA drive system and a liquid crystal panel. Two GOA modules (2) are respectively provided at two sides of the liquid crystal display area (1), and each GOA module (2) is electrically coupled to one automatic detection interrupting function module (3) correspondingly, and each automatic detection interrupting function module (3) receives a feedback signal (FB) transmitted from the GOA unit circuit of the last stage of the GOA module (2), and by detecting whether the feedback signal (FB) is normal or abnormal, the scan start signal (STV) is transmitted or not transmitted to the corresponding GOA module (2) to normally drive the corresponding GOA module (2) or terminate driving so that as the GOA module (2) at one side of the liquid crystal panel display area (1) appears to be abnormal, the corresponding automatic detection interrupting function module (3) terminates driving the abnormal GOA module (2), and the GOA module (2) at the other side of the liquid crystal panel display area (1) continues normal driving, which contributes to raise the yield of the liquid crystal panel.

An LCD includes a substrate, gate on array (GOA) units connected in series, a controller, a level shifter, and an over-current protection circuit. The substrate includes a pixel array section and a circuit arrangement section. The GOA units are used for outputting a scanning signal to the pixel array section based on voltage levels of clock signals and a voltage level of a start signal. The controller generates the clock signals and the start signal. The level shifter adjusts the voltage levels of the clock signals and the voltage level of the start signal. The over-current protection circuit outputs an adjusting signal to the controller to turn off the LCD when a magnitude of one of the plurality of clock signals is over a predetermined value. Therefore, the LCD is turned off for a while, preventing from being burnt out.

Disclosed are an overcurrent protection method, a display panel and a display device. The overcurrent protection method is applied to the display panel. The display panel includes a power supply circuit, a timing controller, a level shifting circuit and a gate driving circuit. The overcurrent protection method includes: in response to the level shifting circuit outputting a start clock signal to the gate driving circuit, timing, by the timing controller, and obtaining an input current average value input by the power supply circuit to the level shifting circuit during a first timing period t0 to t1; and controlling the gate driving circuit to enter an overcurrent protection state, in response to the input current average value being greater than or equal to a preset current average value.

An electromagnetic interference suppression circuit, a driving method thereof, and an electronic apparatus are provided. In the electromagnetic interference suppression circuit, a signal generating sub-circuit may generate a plurality of parallel target sequence signals, each with a period greater than a period threshold and a quantity of target sequence signals greater than a quantity threshold; and a frequency generating sub-circuit may output a frequency-jittered drive signal, for driving a switch mode power supply to operate, to the switch mode power supply under the control of the plurality of parallel target sequence signals.

Disclosed is a display module. The display module includes a display panel including an inorganic light emitting device, a sweep electrode connected to at least one input pin, and a pulse width modulation (PWM) pixel circuit, and a driving unit configured to provide a sweep signal to the sweep electrode through the at least one input pin, in which the PWM pixel circuit includes a driving transistor, and provides a driving current having a pulse width corresponding to a data voltage to the inorganic light emitting device by changing a voltage of a gate terminal of the driving transistor according to the sweep signal applied through the sweep electrode, and a number of the at least one input pin varies depending on a size of the display panel.

Systems and methods are described for preventing damage from overcurrent flows in a display device. The display device may include a display panel, a display panel driving circuit, and a driving control circuit. The display device also includes, a power management integrated circuit and a display panel protection circuit. If an overcurrent condition is detected, the display panel protection circuit may periodically mask frames from being sent to the display panel to prevent damage.