A display device includes a display panel, a scan driver, a data driver, a sensing circuit, and a controller configured to select a pixel row from a plurality of pixel rows in a vertical blank period of each frame period. The vertical blank period includes a sensing time in which the sensing circuit performs a sensing operation for the selected pixel row. The sensing circuit measures a first source voltage of a driving transistor of each pixel in the selected pixel row at a first time point of the sensing time, and measures a second source voltage of the driving transistor at a second time point of the sensing time. The controller predicts a current saturated source voltage of the driving transistor based on the first and second source voltages, and determines a threshold voltage change amount of the driving transistor based on a difference between a previous saturated source voltage and the current saturated source voltage.

An electronic display includes an active area including multiple pixels. The electronic display also includes a first row driver set including a first column of row drivers and a second column of row drivers. A first active row driver in the first column of row drivers drives a first portion of the multiple pixels, and a first spare row driver in the second column of row drivers is in an inactive state. The electronic display also includes a second row driver set including a third column of row drivers and a fourth column of row drivers. A third active row driver in the third column of row drivers drives a second portion of the multiple pixels, and a second spare row driver in the fourth column of row drivers is inactive.

Disclosed are a gate-on voltage generation circuit, a display panel driving device and a display device. The gate-on voltage generation circuit includes an on/off voltage output terminal, a power management integrated circuit and a voltage switching circuit. The power management integrated circuit includes a detection terminal connected to the on/off voltage output terminal, is configured for detecting a voltage output by the on/off voltage output terminal, and outputting first switch control signal or second switch control signal according to the voltage output from the on/off voltage output terminal. The voltage switching circuit includes a first input terminal for inputting a first voltage value and a second input terminal for inputting a second voltage value larger than the first voltage value. The voltage switching circuit outputs the first voltage value upon receiving the first switch control signal, and outputs the second voltage value upon receiving the second switch control signal.

The present disclosure provides a shift register, a gate driving circuit, a display panel, and a driving method thereof. The shift register includes: an input circuit; an output circuit; a first control circuit configured to provide a potential of a first control signal terminal to a pull-down node, and provide a potential of a reference signal terminal to the pull-down node according to the potential of the pull-up node; and a second control circuit connected to the pull-down node, a second control signal terminal, the output signal terminal, and the reference signal terminal, wherein the second control circuit is configured to pull down a potential of the output signal terminal during a display phase under the control of a potential of the pull-down node and a potential of the second control signal terminal, and pull up the potential of the output signal terminal in a power-off phase.

A method for displaying an animation by a display chip of an electronic device, which includes a non-volatile memory and a random-access memory. The display chip includes a video output register and a display register. The method includes a first static programming phase including configuring the video output register; writing n images in the memory, n being an integer higher than or equal to two; writing into the memory of a plurality of nodes, such that each node includes the address in the memory of at least one portion of an image, as well as the address of the following node in the memory, the last node including the address in the random-access memory of the first node; and configuring the display register. The method also includes a second phase in which the n images are read by the display chip by the display register, to display the animation.

A drive control circuit is disclosed, and the drive control circuit is connected in series between a driving circuit and a first voltage terminal and forms a loop together. The drive control circuit comprises a current adjustment circuit and a control circuit. The current adjustment circuit controls a current in the loop according to a voltage signal difference between a voltage signal of a second node and a voltage signal of a first node. The control circuit controls the voltage signal of the second node according to the voltage signal of the first node, so that the current adjustment circuit controls the current in the loop during a start-up phase of the driving circuit.

There is provided a display device in which display elements included in pixels are arrayed in a row direction and a column direction in a two-dimensional matrix, in which each of the display elements includes a current-driven light emitting unit and a drive circuit for driving the light emitting unit, the drive circuit includes at least a drive transistor and a capacitor, the drive transistor has one source/drain region to which a drive voltage is applied via a first feeder line and the other source/drain region connected to one end of the light emitting unit, and is configured in such a manner that a current corresponding to a voltage held in the capacitor flows to the light emitting unit via the drive transistor, and the drive voltage is applied to the one source/drain region of the drive transistor after a voltage of the other source/drain region of the drive transistor is set in such a manner that a difference between the voltage of the other source/drain region of the drive transistor and the drive voltage is decreased.

Disclosed is a protection circuit of a memory in a display panel. The circuit includes: a timing controller, for outputting a first control signal; a memory, for storing software data of the timing controller; a power supply circuit, for outputting a power signal; and a monitor circuit, having three input ends and a signal output end, two input ends being respectively connected to the power supply circuit and a control signal output end, and the other one input end being input with a write control signal; the monitor circuit controls the memory to be in a write protection state when in a normal state, and controls the memory to be in a write enable state when a level state collection of the power signal, the first control signal, and the write control signal satisfies a preset level state collection.

A display apparatus capable of correcting an image quality change caused by long-term use is provided. The display apparatus includes: a display panel; a communicator configured to communicate with a service apparatus; and a controller configured to control the communicator to transmit operation information including a total operating time of the display apparatus and an operating temperature of the display apparatus, to the service apparatus; receive an image parameter from the service apparatus through the communicator, and based on the received image parameter data; process image data; and transmit the processed image to the display panel. The image parameter may include at least one of a brightness level, a contrast, a sharpness level, and a color density of the display panel.

A method of configuring a display device interface (DDI) detects a trigger signal, generated by a display device. If the trigger signal is associated with a power on event, a full configuration of the DDI is performed, including loading display device capability information provided by the display device into DDI configuration registers and setting one or more DDI configuration parameters accordingly. If the trigger signal is associated with resume event, rather than a power on event, a modified fast link resume operation may be performed to route the trigger signal to a controller configured to explicitly write display device capability information to the appropriate DDI configuration registers before setting the corresponding DDI configuration parameter accordingly. The DDI may include a re-timer, between the DDI source and sink, configured to snoop the explicit write transaction such that the re-timer configuration is also updated.