An approach for providing a user interface having a resolution corresponding to a resolution of a high resolution content is provided. The approach allocates at least one partial frame buffer based on a size and a location of a region on a screen of a display on which a user interface (UI) is displayed. The approach displays the UI based on at least one piece of partial graphic data obtained from the allocated at least one partial frame buffer.

The present teaching relates to method, system, medium, and implementations for LED display. A first signal is received that signals a timing for a next data transfer. In response to the first signal, a bit-based image block stored in a memory is transferred, via a bus connected thereto, to one of a pair of alternate buffers pointed to by a write buffer pointer, which is subsequently toggled to point to another of the pair of alternate buffers. A second signal is received that signals a timing for refreshing the LED display. In response to the second signal, the bit-based image block is retrieved from the one of the pair of alternate buffers pointed to by a read buffer pointer, which is then toggled to point to the other of the pair of alternate buffers. The lights of the LED display are then refreshed in accordance with control signals generated based on the bit-based image block.

The present teaching relates to method, system, medium, and implementations for data transfer in LED display. A signal signaling a timing for a next data transfer is received. In response to the signal, a next data transfer instruction is obtained that instructs reading a bit-based image block of an image from a memory. The bit-based image block is transferred, according to the next data transfer instruction, from the memory via a bus connected thereto, to one of a pair of alternate buffers pointed to by a write buffer pointer. Then, the write buffer pointer is toggled to point to another of the pair of alternate buffers and the process repeats. The bit-based image blocks alternately stored in the buffers are later retrieved and displayed on the LED display.

According to an embodiment, the display device includes a touch controller, an image processor, and a display driver. The touch controller is configured to output touch event information corresponding to a touch signal received from a touch panel. The image processor is configured to determine whether a host is in a sleep mode or a normal mode, and to output mixed image data obtained by overlapping an image displayed on a display panel and a marker corresponding to the touch event information while a host is in the sleep mode. The display driver is configured to output pixel driving signals corresponding to the mixed image data to the display panel. The touch controller or image processor is further configured to determine whether a touch input of a user to the touch panel meets a predetermined condition, and if the predetermined condition is met, output a wake-up signal to the host.

Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.

This application is directed to a method of managing processing capability of a server system having one or more processing cores that further include multiple processing slices. Upon receiving requests to initiate online gaming sessions, the server system allocates each processing slice of the processing cores to a subset of the online gaming sessions to be executed thereon. A first processing slice is allocated to a first subset of the online gaming sessions including a first gaming session and a second gaming session. At the first processing slice, a time-sharing processing schedule is determined for the first subset of the online gaming sessions. In accordance with the time-sharing processing schedule, the first and second gaming sessions share a duty cycle of the first processing slice, and are executed dynamically and in parallel according to real-time data processing need of the first and second gaming sessions.

A display driving integrated circuit (DDIC) driving a display device and including; a host interface configured to receive image data from a host device, an interface monitor configured to generate a mode signal indicating a still image mode or a video mode by detecting whether the image data from the host device is transferred through the host interface, a processing circuit configured to generate processed data by processing the image data, a conversion circuit configured to perform data conversion on the processed data to generate display data driving a display panel, and a path controller configured to store the processed data in a frame buffer and transfer the processed data stored in the frame buffer to the conversion circuit in the still image mode, and further configured to transfer the processed data to the conversion circuit without storing the processed data in the frame buffer in the video mode.

The invention provides an image output device coupled to a first and second signal source and a method thereof. The image output device includes memories configured to store frame image data respectively, a source selection circuit coupled to the first and second signal sources and the memories and configured to choose to store a first frame image data transmitted by the first or second signal source in one of the memories according to a working state of the first signal source, and an image output circuit coupled to the memories and the source selection circuit and configured to output the first frame image data stored in one of the memories. The image output device may rapidly switch to a backup signal source when the signal source is unstable to achieve fast switching and perfect connection.

Systems and methods are configured to adjust the timing of rendered frame scanout in response to fluctuations in a variable frame rate at which source frames are rendered.

A display driving integrated circuit (DDIC) driving a display device and including; a host interface configured to receive image data from a host device, an interface monitor configured to generate a mode signal indicating a still image mode or a video mode by detecting whether the image data from the host device is transferred through the host interface, a processing circuit configured to generate processed data by processing the image data, a conversion circuit configured to perform data conversion on the processed data to generate display data driving a display panel, and a path controller configured to store the processed data in a frame buffer and transfer the processed data stored in the frame buffer to the conversion circuit in the still image mode, and further configured to transfer the processed data to the conversion circuit without storing the processed data in the frame buffer in the video mode.