A memory module includes an emergency power supplier, a plurality of ranks each including one or more volatile memories, a non-volatile memory, and a controller suitable for backing up data of the ranks into the non-volatile memory by using the emergency power supplier during a power failure, wherein the ranks are sequentially backed up, and while one rank is backed up among the ranks, the other ranks are controlled in a self-refresh mode.

The present invention is directed to computer storage systems and methods thereof. In an embodiment, a memory system comprises a controller module, a nonvolatile memory, and a volatile memory. The controller module operates according to a command and operation table. The command and operation table can be updated to change the way controller module operates. When the command and operation table is updated, the updated table is stored at a predefined location of the nonvolatile memory. There are other embodiments as well.

The present invention is directed to computer storage systems and methods thereof. In an embodiment, a memory system comprises a controller module, a nonvolatile memory, and a volatile memory. The controller module operates according to a command and operation table. The command and operation table can be updated to change the way controller module operates. When the command and operation table is updated, the updated table is stored at a predefined location of the nonvolatile memory. There are other embodiments as well.

A memory accessed by rows and/or by columns in which an array of bits can be physically stored in multi-bit wide columns in physically contiguous rows is provided. A multi-bit wide logical column is arranged diagonally across (M/multi-bits) physical rows and (M/multi-bits) physical columns with each of the plurality of multi-bit wide logical columns in the logical row stored in a different physical row and physical multi-bit column.

In a data storage control device for writing data into a first memory that is non-volatile memory, an information receipt unit receives voltage-related information from a power source control device. A condition determination unit determines whether a voltage condition is satisfied. When the condition determination unit determines that the voltage condition is satisfied during execution of a writing process, a memory controller determines whether a predetermined storage condition is satisfied. When the storage condition is not satisfied, the memory controller executes a first response process of withdrawing writing residual data into the first memory but setting a validity flag as invalid. When the storage condition is satisfied, the memory controller executes a second response process of writing the residual data into the first memory.

An integrated circuit includes: a primary supply stage including a primary supply node, the primary supply stage being configured to deliver a primary supply voltage to the primary supply node; a secondary supply stage including a secondary supply node, the secondary supply stage being configured to deliver a secondary supply voltage to the secondary supply node; a supply-switching circuit; a pre-charging circuit controllably coupled to the secondary supply node via the supply-switching circuit; and a volatile memory circuit controllably coupled to the primary supply node and the secondary supply node via the supply-switching circuit, wherein the switching circuit is configured to connect a supply of the volatile memory circuit either to the primary supply node in a primary supply mode, or to the secondary supply node in a secondary supply mode.

Auxiliary power management devices are disclosed. In some implementations, an auxiliary power management device may be coupled to an auxiliary power source that serves as a backup power supply for a primary power source to provide power to an electronic device and comprising a plurality of switches to control currents of a plurality of energy storage components, a plurality of channels coupled to the plurality of switches, respectively, a plurality of switch controllers to control the plurality of switches coupled to the plurality of channels and monitor a current or voltage of the plurality of channels, and a management logic to control the switches coupled to the plurality of channels upon detection, by the plurality of switch controllers, of a first current or voltage distribution across the channels that exceeds a predetermined threshold regarding the current or voltage distribution.

A method includes writing received data sequentially to a particular location of a cyclic buffer of a memory device according to a first set of threshold voltage distributions. The method further includes performing a touch up operation on the particular location by adjusting the first set of threshold voltage distributions of the data to a second set of threshold voltage distributions in response to a determination that a trigger event has occurred. The second set of threshold voltage distributions can have a larger read window between adjacent threshold voltage distributions of the second set than that of the first set of threshold voltage distributions.

A memory sub-system includes a power management integrated circuit (PMIC) compatible with operation at an uppermost PMIC supply voltage that is lower than a primary supply voltage of the memory sub-system. The PMIC is configured to output multiple voltages for operation of the memory sub-system based on a PMIC supply voltage. The memory sub-system further includes a capacitive voltage modifier (CVM) coupled to the PMIC. The CVM is configured to receive the primary supply voltage of the memory sub-system as an input and provide a first modified primary supply voltage (MPSV) to the PMIC as the PMIC supply voltage, where the first MPSV is not higher than the uppermost PMIC supply voltage.

A power failure prevention system includes a switch circuit, an energy storage circuit, a voltage detector circuit and a control circuit. The switch circuit includes a first switch, a second switch, a third switch and a fourth switch. The energy storage circuit is connected to the switch circuit. The voltage detector circuit detects an input voltage provided by an input voltage source and a stored voltage of the energy storage circuit. The control circuit controls the switch circuit according to the detected input voltage and stored voltage. When the input voltage is higher than a first threshold, the switch circuit allows the input voltage to charge the energy storage circuit. When the input voltage is lower than a second threshold, the switch circuit allows the stored voltage to discharge to the input voltage source. The first threshold is higher than the second threshold.