Patent classifications
G11C11/08
Memory device for effectively checking program state and operation method thereof
A memory device includes: a plurality of page buffers connected a plurality of bit lines and configured to selectively precharge the bit lines, and a control circuit configured to: perform a first verify operation by applying a precharge voltage to a first bit line among the bit lines according to program data and by applying a first verify voltage to a selected word line, perform a second verify operation, after the first verify operation, by applying the precharge voltage to a second bit line not overlapping the first bit line and by applying a second verify voltage to the selected word line, and perform at least one of an operation of floating the first bit line and an operation of applying the precharge voltage according to a threshold voltage of a memory cell connected to the first bit line during the second verify operation.
Spin-orbit-torque (SOT) MRAM with doubled layer of SOT metal
A magnetic random access memory (MRAM) apparatus and method are provided. The apparatus includes a magnetic tunnel junction (MTJ) stack; a spin-orbit-torque (SOT) layer that underlies the MTJ stack; and a dielectric pillar that underlies the SOT layer and the MTJ stack. The SOT layer has a stepped profile. The method includes forming a dielectric base of a first dielectric material and a dielectric pillar of a second dielectric material, wherein the dielectric pillar protrudes from the dielectric base, forming a first intermediate structure by depositing a first layer of conductive material onto the dielectric base, sufficiently thick to cover the pillar and the base, forming a planarized structure by planarizing the first intermediate structure to reveal the pillar, and depositing a second layer of spin-orbit-torque metal onto the planarized structure.
Spin-orbit-torque (SOT) MRAM with doubled layer of SOT metal
A magnetic random access memory (MRAM) apparatus and method are provided. The apparatus includes a magnetic tunnel junction (MTJ) stack; a spin-orbit-torque (SOT) layer that underlies the MTJ stack; and a dielectric pillar that underlies the SOT layer and the MTJ stack. The SOT layer has a stepped profile. The method includes forming a dielectric base of a first dielectric material and a dielectric pillar of a second dielectric material, wherein the dielectric pillar protrudes from the dielectric base, forming a first intermediate structure by depositing a first layer of conductive material onto the dielectric base, sufficiently thick to cover the pillar and the base, forming a planarized structure by planarizing the first intermediate structure to reveal the pillar, and depositing a second layer of spin-orbit-torque metal onto the planarized structure.
Spin-orbit-torque (SOT) MRAM with doubled layer of SOT metal
A magnetic random access memory (MRAM) apparatus and method are provided. The apparatus includes a magnetic tunnel junction (MTJ) stack; a spin-orbit-torque (SOT) layer that underlies the MTJ stack; and a dielectric pillar that underlies the SOT layer and the MTJ stack. The SOT layer has a stepped profile. The method includes forming a dielectric base of a first dielectric material and a dielectric pillar of a second dielectric material, wherein the dielectric pillar protrudes from the dielectric base, forming a first intermediate structure by depositing a first layer of conductive material onto the dielectric base, sufficiently thick to cover the pillar and the base, forming a planarized structure by planarizing the first intermediate structure to reveal the pillar, and depositing a second layer of spin-orbit-torque metal onto the planarized structure.