A magnetic Josephson junction (MJJ) device having a ferrimagnetic/ferromagnetic (FIM/FM) exchange-biased bilayer used as the magnetic hard layer improves switching performance by effectively sharpening the hysteresis curve of the device, thereby reducing error rate when the device is used in a Josephson magnetic random access memory (JMRAM) memory cell. Thus, the materials and devices described herein can be used to build a new type of MJJ, termed a ferrimagnetic Josephson junction (FIMJJ), for use in JMRAM, to construct a robust and reliable cryogenic computer memory that can be used for high-speed superconducting computing, e.g., with clock speeds in the microwave frequency range.

A magnetic Josephson junction (MJJ) device having a ferrimagnetic/ferromagnetic (FIM/FM) exchange-biased bilayer used as the magnetic hard layer improves switching performance by effectively sharpening the hysteresis curve of the device, thereby reducing error rate when the device is used in a Josephson magnetic random access memory (JMRAM) memory cell. Thus, the materials and devices described herein can be used to build a new type of MJJ, termed a ferrimagnetic Josephson junction (FIMJJ), for use in JMRAM, to construct a robust and reliable cryogenic computer memory that can be used for high-speed superconducting computing, e.g., with clock speeds in the microwave frequency range.

A novel and useful quantum computing machine architecture that includes a classic computing core as well as a quantum computing core. A programmable pattern generator executes sequences of instructions that control the quantum core. In accordance with the sequences, a pulse generator functions to generate the control signals that are input to the quantum core to perform quantum operations. A partial readout of the quantum state in the quantum core is generated that is subsequently re-injected back into the quantum core to extend decoherence time. Access gates control movement of quantum particles in the quantum core. Errors are corrected from the partial readout before being re-injected back into the quantum core. Internal and external calibration loops calculate error syndromes and calibrate the control pulses input to the quantum core. Control of the quantum core is provided from an external support unit via the pattern generator or can be retrieved from classic memory where sequences of commands for the quantum core are stored a priori in the memory. A cryostat unit functions to provide several temperatures to the quantum machine including a temperature to cool the quantum computing core to approximately 4 Kelvin.

Apparatus and methods relating to programmable superconducting cells are described. A programmable superconducting cell can be formed from a superconducting current loop having at least two terminals connected to the loop. The current loop and terminals can be formed from a single layer of superconducting material. The programmable superconducting cell can be incorporated into a crossbar architecture to form a high-speed vector-matrix multiplying processor for deep neural network computations.

Apparatus and methods relating to programmable superconducting cells are described. A programmable superconducting cell can be formed from a superconducting current loop having at least two terminals connected to the loop. The current loop and terminals can be formed from a single layer of superconducting material. The programmable superconducting cell can be incorporated into a crossbar architecture to form a high-speed vector-matrix multiplying processor for deep neural network computations.

Systems and methods related to scheduling of tasks for execution in parallel based on geometric reach are described. An example method includes processing information pertaining to connectivity among superconducting components and nodes included in a shared floor plan to generate a plurality of areas of reach, where each of the plurality of areas of reach corresponds to a portion of the shared floor plan. The method further includes generating a plurality of inflated areas of reach by inflating each of the plurality of areas of reach based on a target inductance of wires for routing signals among the superconducting components and the nodes included in the shared floor plan. The method further includes scheduling parallel execution of tasks for routing wires among a subset of the superconducting components and the nodes within any of the plurality of inflated areas of reach satisfying a geometric constraint.

Systems and methods related to scheduling of tasks for execution in parallel based on geometric reach are described. An example method includes processing information pertaining to connectivity among superconducting components and nodes included in a shared floor plan to generate a plurality of areas of reach, where each of the plurality of areas of reach corresponds to a portion of the shared floor plan. The method further includes generating a plurality of inflated areas of reach by inflating each of the plurality of areas of reach based on a target inductance of wires for routing signals among the superconducting components and the nodes included in the shared floor plan. The method further includes scheduling parallel execution of tasks for routing wires among a subset of the superconducting components and the nodes within any of the plurality of inflated areas of reach satisfying a geometric constraint.

A quantum processor is operable as a universal adiabatic quantum computing system. The quantum processor includes physical qubits, with at least a first and second communicative coupling available between pairs of qubits via an in-situ tunable superconducting capacitive coupler and an in-situ tunable superconducting inductive coupler, respectively. Tunable couplers provide diagonal and off-diagonal coupling. Compound Josephson junctions (CJJs) of the tunable couplers are responsive to a flux bias to tune a sign and magnitude of a sum of a capacitance of a fixed capacitor and a tunable capacitance which is mediated across a pair of coupling capacitors. The qubits may be hybrid qubits, operable in a flux regime or a charge regime. Qubits may include a pair of CJJs that interrupt a loop of material and which are separated by an island of superconducting material which is voltage biased with respect to a qubit body.

A memory is capable of storing coupled qubits. The memory includes a plurality of memory cells, wherein each of the memory cells is for storing values of one of the qubits. The memory also includes an electronic controller electrically connected to operate said memory cells. The controller is able to selectively store a qubit value to any of the memory cells in either a first state or a second state. The controller is configured to read any one of the memory cells in a manner dependent on whether the first state or the second state was previously used to store a qubit value in the same one of the memory cells.

An active three-terminal superconducting device having an intersection region at which a hot spot may be controllably formed is described. The intersection region may exhibit current crowding in response to imbalances in current densities applied to channels connected to intersection region. The current crowding may form a hot spot, in which the superconducting device may exhibit a measurable resistance. In some cases, a three-terminal superconducting device may be configured to sense an amount of superconducting current flowing in a channel or loop without having to perturb the superconducting state or amount of current flowing in the channel. A three-terminal superconducting device may be used to read out a number of fluxons stored in a superconducting memory element.