Some embodiments include memory devices having a wordline, a bitline, a memory element selectively configurable in one of three or more different resistive states, and a diode configured to allow a current to flow from the wordline through the memory element to the bitline responsive to a voltage being applied across the wordline and the bitline and to decrease the current if the voltage is increased or decreased. Some embodiments include memory devices having a wordline, a bitline, memory element selectively configurable in one of two or more different resistive states, a first diode configured to inhibit a first current from flowing from the bitline to the wordline responsive to a first voltage, and a second diode comprising a dielectric material and configured to allow a second current to flow from the wordline to the bitline responsive to a second voltage.

The present disclosure generally relates to combinations of resistive change elements and resistive change element arrays thereof. The present disclosure also generally relates to combinational resistive change elements and combinational resistive change element arrays thereof. The present disclosure additionally generally relates to devices and methods for programming and accessing combinations of resistive change elements. The present disclosure further generally relates to devices and methods for programming and accessing combinational resistive change elements.

A nanostructured cross-wire memory architecture is provided that can interface with conventional semiconductor technologies and be electrically accessed and read. The architecture links lower and upper sets of generally parallel nanowires oriented crosswise, with a memory element that has a characteristic conductance. Each nanowire end is attached to an electrode. Conductance of the linkages in the gap between the wires encodes the information. The nanowires may be highly-conductive, self-assembled, nucleic acid-based nanowires enhanced with dopants including metal ions, carbon, metal nanoparticles and intercalators. Conductance of the memory elements can be controlled by sequence, length, conformation, doping, and number of pathways between nanowires. A diode can also be connected in series with each of the memory elements. Linkers may also be redox or electroactive switching molecules or nanoparticles where the charge state changes the resistance of the memory element.

Combinations of resistive change elements and resistive change element arrays thereof are described. Combinational resistive change elements and combinational resistive change element arrays thereof are described. Devices and methods for programming and accessing combinations of resistive change elements are described. Devices and methods for programming and accessing combinational resistive change elements are described.

Some embodiments include memory devices having a wordline, a bitline, a memory element selectively configurable in one of three or more different resistive states, and a diode configured to allow a current to flow from the wordline through the memory element to the bitline responsive to a voltage being applied across the wordline and the bitline and to decrease the current if the voltage is increased or decreased. Some embodiments include memory devices having a wordline, a bitline, memory element selectively configurable in one of two or more different resistive states, a first diode configured to inhibit a first current from flowing from the bitline to the wordline responsive to a first voltage, and a second diode comprising a dielectric material and configured to allow a second current to flow from the wordline to the bitline responsive to a second voltage.

The present disclosure relates to a resistive random access memory device and a preparing method thereof.

Memristive devices based on tunable Schottky barrier are provided. In one aspect, a method of forming a memristive device includes: forming a semiconductor layer on a bottom metal electrode, wherein the semiconductor layer has workfunction-modifying molecules embedded therein; and forming a top metal electrode on the semiconductor layer, wherein the top metal electrode forms a Schottky junction with the semiconductor layer, and wherein the workfunction-modifying molecules are configured to alter a workfunction of the top metal electrode. A memristive device and a method for operating a memristive device are also provided.

A memory cell includes an input coupled to a read line, an output coupled to a circuit ground, a bi-polar memristor, and at least one address switch coupled to an address line to select the memory cell. A memory includes the bi-polar memristor and a one-way current conducting device, wherein the one-way current conducting device is positioned between the memristor cell output and the circuit ground, or between the read line and the memristor cell input.

Memristive devices based on tunable Schottky barrier are provided. In one aspect, a method of forming a memristive device includes: forming a semiconductor layer on a bottom metal electrode, wherein the semiconductor layer has workfunction-modifying molecules embedded therein; and forming a top metal electrode on the semiconductor layer, wherein the top metal electrode forms a Schottky junction with the semiconductor layer, and wherein the workfunction-modifying molecules are configured to alter a workfunction of the top metal electrode. A memristive device and a method for operating a memristive device are also provided.

A memory device is provided that includes a memory controller coupled to a memory cell including a barrier modulated switching structure. The memory controller is adapted to program the memory cell to a first programming state, and program the memory cell to one of a plurality of target programming states from the first programming state.