Embodiments of the present disclosure relate to a programmable metamaterial which comprises an array of phase-change material elements. A domain inducing component may be coupled to at least one phase-change material element of the array of phase-change material elements. The domain inducing component may be configured to program the refractive index of the at least one phase-change material element and reprogram the refractive index of the at least one phase-change material element by inducing a phase transition in a domain of the at least one phase-change material element. A method for programming the metamaterial may include selecting the phase-change material element for programming and programming the refractive index of the selected phase-change material element by inducing a phase transition in a domain of the selected phase-change material element.

Methods, systems, techniques, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be used to charge a second ferroelectric memory cell by transferring charge from a plate of first ferroelectric memory cell to a plate of the second ferroelectric memory cell. In some examples, prior to the transfer of charge, the first ferroelectric memory cell may be selected for a first operation in which the first ferroelectric memory cell transitions from a charged state to a discharged state and the second ferroelectric memory cell may be selected for a second operation during which the second ferroelectric memory cell transitions from a discharged state to a charged state. The discharging of the first ferroelectric memory cell may be used to assist in charging the second ferroelectric memory cell.

An optically gated transistor (OGT) device that may be used as a selector device for one or more variable resistive memory devices. The OGT device isolates the one or more variable resistive memory devices when the OGT is not optically activated. The amount of current conducted by the OGT device is dependent on an intensity of light optically applied to the OGT device. The OGT device includes alternating layers of germanium selenide (GeSe) and GeSe plus an additional element deposited on a substrate. The OGT device includes only two electrodes connected to the alternating layers deposited on the substrate. The OGT device may generate an amplified electrical signal with respect to the magnitude of a received optical signal. The OGT device may be used to generate an optical signal having a different wavelength than the wavelength of a received optical signal.

Provided is an optically restorable semiconductor device including a gate electrode, a gate insulation film on the gate electrode, a photo-responsive semiconductor film on the gate insulation film, and an interface charge part disposed adjacent to an interface between the photo-responsive semiconductor film and the gate insulation film, wherein the interface charge part includes charge traps, and the interface charge part and the photo-responsive semiconductor film directly contact with each other.

Methods of operating a ferroelectric memory cell. The method includes applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell having a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. Another of the positive bias voltage and the negative bias voltage is applied to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Related ferroelectric memory cells include a ferroelectric material exhibiting asymmetric switching properties.

A nonvolatile protein memory system with optical write/erase and electrical readout capability is provided. The nonvolatile protein memory system includes: a substrate including a microfluidic channel having a pH gradient; a photosensitive protein disposed in the microfluidic channel; and a first electrode and a second electrode disposed on the microfluidic channel and spaced apart from each other and detecting a position change of the photosensitive protein in the microfluidic channel.

Methods, systems, techniques, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be used to charge a second ferroelectric memory cell by transferring charge from a plate of first ferroelectric memory cell to a plate of the second ferroelectric memory cell. In some examples, prior to the transfer of charge, the first ferroelectric memory cell may be selected for a first operation in which the first ferroelectric memory cell transitions from a charged state to a discharged state and the second ferroelectric memory cell may be selected for a second operation during which the second ferroelectric memory cell transitions from a discharged state to a charged state. The discharging of the first ferroelectric memory cell may be used to assist in charging the second ferroelectric memory cell.

An electro-optic random-access memory enables (1) ultra-fast write and read operation (2) featuring differential sensing (3) wavelength, and polarization multiplex high bandwidth memory access (4) enables very large-scale memory array for wafer scale ICs.

An electronic device includes a substrate, a gate electrode, a dielectric layer, a source electrode, a drain electrode, and a semiconducting layer formed from an organic semiconductor compound and a photo-responsive polymer. The resistance can be switched to a low state by irradiation, and can be switched to a high state by applying a gate bias voltage. This can be useful for a memory device.

A method for reading data of a memory cell including a resistive memory element having a low resistance state and a high resistance state according to stored data and a selection element may include applying a recovery voltage to both ends of the memory cell, and applying a read voltage to both ends of the memory cell and sensing the data. The recovery voltage may be equal to or more than a second voltage obtained by adding a drift value of the memory cell to a first voltage for turning on the memory cell in a case in which the resistive memory element is in the low resistance state.