The present application discloses a display apparatus having a display area and a peripheral area. The display apparatus includes a gate-driver-on-array circuit in the peripheral area having N numbers of shift register units for respectively outputting a plurality of gate scanning signals to the plurality of gate lines. An n-th shift register unit of the N numbers of shift register units includes an input port for receiving an input signal from an output port of a m-th shift register unit through an input signal line, and a reset port for receiving a reset signal from an output port of a p-th shift register unit through a reset signal line, 1m<n<pN. At least one of the input signal line and the reset signal line includes a first segment in a same layer as a plurality of gate lines, and a second segment in a same layer as a plurality of data lines.

A shift register for a display device. The shift register may include a shift register processing circuit (10) and a control circuit (20). A first terminal of the control circuit (20) may be coupled to an output terminal (Qn) of the shift register processing circuit (10), a second terminal of the control circuit (20) may be coupled to an output terminal of the shift register (Output), and a third terminal of the control circuit (20) may be coupled to a control signal terminal (T0). The shift register may be configured to output a final gate line scan signal from the output terminal of the shift register (Output), and a starting point of the final gate line scan signal is later than a starting point of a gate line scan signal outputted from the output terminal (Qn) of the shift register processing circuit (10).

Provided is a display device. The display device includes a display panel, a gate driving circuit, a sensor part, and a control voltage generator. The gate driving circuit includes driving transistors including a first control electrode and a second control electrode. The sensor part is configured to measure an environmental factor that changes a threshold voltage of the driving transistors. The control voltage generator is configured to apply to the second control electrode a control voltage for controlling the threshold voltage of the driving transistors on the basis of the environmental factor measured by the sensor part.

A shift register unit and a driving method thereof, a gate driving circuit and a display apparatus are disclosed. The shift register unit includes: a pull-up node control module (21), a pull-down node control module (22), a gate driving signal output terminal (OUTPUT(N)) and a gate driving signal output module (23), the gate driving signal output module (23) is connected to a pull-up node (PU(N)), a pull-down node (PD(N)), an non-inverting clock signal input terminal (CLK) and the gate driving signal output terminal (OUTPUT(N) respectively; and the pull-down node control module (22) is connected to the pull-down node (PD(N)) and an inverting clock signal input terminal (CLKB) respectively; the shift register unit further includes: a noise reduction module (24) connected to a noise reduction control signal output terminal (Ctrl) and a gate driving signal output terminal respectively (OUTPUT(N)).

A shift register unit, a gate driving circuit, a display device and a driving method are disclosed. The shift register unit includes an input circuit, a first node reset circuit, an output circuit and a first reset control circuit. The input circuit is configured to provide an input signal to a first node; the first node reset circuit is configured to reset the first node under control of a level of a reset control node; the output circuit is configured to output an output signal at the output terminal under control of a level of the first node; and the first reset control circuit is configured to control the level of the reset control node in response to a reset control signal.

A semiconductor device includes a mode control circuit suitable for selectively masking first and second initial input control signals and an initial feedback signal depending on a mode control signal and outputting first and second input control signals and a feedback signal; and a multiple-input shift register (MISR) circuit including a plurality of input selectors and a plurality of registers which are alternatively coupled in series with one another, wherein each of the plurality of input selectors combines an output signal of a previous stage register among the plurality of registers and an external input signal depending on the first and second input control signals and the feedback signal and provides an input signal for a next stage register among the plurality of registers.

Disclosed are a gate driver circuit, a level shifter and a display apparatus. The gate driver circuit includes a potential enhancing unit, a switch unit, a current detecting unit, and a control unit. The potential enhancing unit is configured to divide a clock signal output by a timing sequence controller into two clock signal groups after the clock signal being potential enhanced, and correspondingly output the two clock signal groups to two shift register groups; the switch unit is configured to control to output or stop outputting the clock signal groups; the current detecting unit is configured to respectively detect output current of each sub-clock signal; the control unit is configured to compare current values corresponding to the plurality of current signals with a preset current threshold respectively, output a control signal to the switch unit.

The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.

A shift register, a driving method, a gate driving circuit and a display device are provided. The shift register includes: a reset circuit, a latch circuit, an output control circuit, and an output circuit which are series connected in sequence. The reset circuit is configured to provide an input signal from the input signal end for the pull-up node under the control of a reset signal from the reset signal end; the latch circuit is respectively connected to the input signal end and the pull-up node, and is configured to control the potential of the pull-up node; the output control circuit is respectively connected to the pull-up node, a dock signal end, and a control node, and is configured to control the potential of the control node; and the output circuit is respectively connected to the control node and an output end, and is configured to control the potential of the output end. The shift register reduces the layout area occupied by the gate driving circuit and can effectively save power consumption and improve the anti-interference ability of the signal.

A voltage control circuit, a shift register unit, and a display device are provided. The voltage control circuit is applied to a shift register unit, the shift register unit includes a gate-driving-signal output end, and the voltage control circuit includes a discharge control end, a discharge circuit and a discharge voltage end. The discharge circuit is configured to, under control of a signal inputted by the discharge control end, control to electrically disconnect the gate-driving-signal output end from the discharge voltage end during a display period of a display screen, and control to electrically connect the gate-driving-signal output end to the discharge voltage end during a shutdown period of the display screen.