A shift register circuit including a flip-flop chain and a control circuit is provided. The flip-flop chain is configured to receive an input signal and output an output signal. The control circuit is coupled to the flip-flop chain. The control circuit is configured to receive the input signal and the output signal and output a control signal to activate the flip-flop chain according to edge transitions of the input signal and the output signal. In addition, a method for controlling a shift register circuit is also provided.

The present disclosure provides a display substrate and a display device, and belongs to the field of display technology. The display substrate of the present disclosure includes: a base substrate having a display region; a plurality of fingerprint identification circuits in the display region of the base substrate, wherein each fingerprint identification circuit includes a control sub-circuit and a detection electrode; wherein in a fingerprint identification phase, the control sub-circuit is configured to read a capacitance between the detection electrode and a valley and a ridge of a fingerprint in response to a fingerprint scanning signal, so as to perform fingerprint identification.

An array substrate, a display panel and a display device are provided. The array substrate has a display area and a non-display area surrounding the display area. The array substrate includes: pixel circuits arranged in the display area in an array along a first direction and a second direction; a first gate driving circuit in the non-display area including first shift register units; and a second gate driving circuit in the non-display area including a plurality of second shift register units in cascade connection. The first gate driving circuit and the second gate driving circuit are electrically connected to different transistors in the pixel circuits; and an orthographic projection of the first gate driving circuit on a plane of the array substrate and an orthographic projection of the second gate driving circuit on the plane of the array substrate at least partially overlap along the second direction.

The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.

A display panel and a display drive method thereof, and a display device are provided. The display panel comprises two parallel and non-overlapping display regions connected to individual scan drive circuits. The display drive method adjusts the pulse width of the light-emitting control signal for each display regions to adjust their respective light-emitting durations within a display period. This method enhances the display quality by avoiding the appearance of a yin-yang screen and improving the display brightness of each display region.

Provided are a display panel and display device. The display panel includes a driver circuit comprising a shift register that is N-stage cascaded, wherein N is a number greater than or equal to 2; where the shift register comprises: a third control unit configured to receive a first voltage signal and generate an output signal in response to a signal of a third node, or receive a second voltage signal and generate an output signal in response to a signal of a second node; and a fourth control unit comprising a first capacitor, a first transistor and a second transistor, where a second plate of the first capacitor is connected to a drain of the first transistor, a source of the second transistor is connected to a first node, and a drain of the second transistor is connected to the third node.

An object is to provide a semiconductor device with improved operation. The semiconductor device includes a first transistor, and a second transistor electrically connected to a gate of the first transistor. A first terminal of the first transistor is electrically connected to a first line. A second terminal of the first transistor is electrically connected to a second line. The gate of the first transistor is electrically connected to a first terminal or a second terminal of the second transistor.

A shift register unit, drive method thereof, gate drive device and display device. The shift register unit includes: an input subcircuit; a reset subcircuit; an output subcircuit configured to provide a clock signal at a clock signal end to a current stage shift register unit output end in response to a voltage signal at the pull-up node and a control signal having a first voltage level, and to disable an output at the current stage output end in response to the control signal having a second voltage level; a pull down control subcircuit configured to provide a second voltage signal having a low voltage level to a pull-down node in response to the voltage signal at the pull-up node, and to provide the voltage signal having a high voltage level to the pull-down node in response to the voltage signal having a high voltage level; and a pull down subcircuit

A gate driving circuit includes a shift unit and a switch unit. The shift unit receives a start input signal, a first clock input signal and a second clock input signal to generate an enable output signal. The switch unit is connected to the shift unit and receiving the enable output signal. The switch unit outputs a third clock signal based on the enable output signal.

A shift register and driving method thereof, a gate driving circuit and a display apparatus are provided. The shift register includes an input unit, a reset unit, a first control unit, a second control unit, a first output unit, a second output unit, a first signal output end and a second signal output end. Potential of the first signal output end is controlled by use of the input unit, the reset unit, the first control unit and the first output unit, and potential of the second signal output end is controlled by use of the input unit, the reset unit, the second control unit and the second output unit. The first control unit and the first output unit, the second control unit and the second output unit are utilized for controlling and sharing the input unit and the reset unit so that function of two shift register units are realized.