Array substrate, display panel and display device are provided. The array substrate includes multiple scanning lines, multiple data lines, multiple shift registers and multiple switching units. Each shift register is used for inputting a scanning signal to one terminal of a corresponding scanning line, the other terminal of each scanning line is connected with a first terminal of the switching unit, a second terminal of the switching unit receives a first reference voltage, a control terminal of the switching unit receives a first control signal. The shift register and the switching unit simultaneously pull down a voltage level of the scanning line to a low level. The present invention can realize a narrow frame, increase the user experience and ensure that the time that the voltage level of the scanning line pulled to the low level is the same.

A display apparatus includes: a display panel including a plurality of pixels respectively connected to a plurality of gate lines; a gate driving circuit including a plurality of driving stages configured to apply gate signals to the gate lines; a voltage generator configured to output a gate-on voltage through a voltage output terminal thereof; and a signal controller configured to sense a variation in current of the voltage output terminal to output a back bias control voltage corresponding to the sensed current variation, wherein each of the driving stages comprises a plurality of oxide thin film transistors and at least one of the oxide thin film transistors is a four-terminal transistor in which a threshold voltage thereof is controlled by the back bias control voltage.

Embodiments of the present disclosure provide a resetting circuit, a shift register, a gate driving circuit and a driving method thereof, and a display device. The first switching sub-circuit, the storage sub-circuit, the controlling sub-circuit, and the second switching sub-circuit in the resetting circuit output a first level signal to a second terminal of the resetting circuit. When a scanning frequency of the gate driving circuit is switched, a resetting function may be implemented by the resetting circuit even if there is no resetting signal provided by a resetting signal terminal for resetting a part of outputting terminals of the gate driving circuit.

The present disclosure provides a gate driving circuit, a method for detecting the gate driving circuit, an array substrate and a display apparatus. The gate driving circuit comprises a plurality of cascaded gate driving units, access units, a first signal line and a second signal line. Each access unit is connected to its corresponding gate driving unit and the gate driving unit at the next stage to its corresponding gate driving unit. The access unit corresponding to the gate driving unit at each odd stage is connected to the first signal line such that the first signal line detects an output signal from that gate driving unit via the access unit, and the access unit corresponding to the gate driving unit at each even stage is connected to the second signal line such that the second signal line detects an output signal from that gate driving unit via the access unit.

Disclosed herein is an electronic device including a flip flop and clock generation circuitry for controlling the flip flop. The flip flop includes a master latch receiving input for the flip flop, with the master latch latching the received input to its output in response to a first clock. The slave latch receives input from the output of the master latch, and latches the received input to its output in response to a second clock. The clock generation circuitry is configured to logically combine a device clock and an input clock to produce the first and second clocks.

A shift register includes a first input circuit, a second input circuit, and a pull-up transistor. The first input circuit is coupled to a first input terminal and a first pull-up node, and configured to electrically connect the first input terminal to the first pull-up node when the first input terminal receives an active signal. The second input circuit is coupled to a second input terminal and a second pull-up node, and configured to electrically connect the second input terminal to the second pull-up node when the second input terminal receives an active signal. The pull-up transistor includes a first gate electrode coupled to the first pull-up node and a second gate electrode coupled to the second pull-up node.

According to an embodiment, a semiconductor device includes a plurality of first interconnections, a plurality of gate dielectric films, and a plurality of second interconnections. The plurality of first interconnections are oxide semiconductors formed in parallel at predetermined intervals in a first direction. The plurality of gate dielectric films are formed on surfaces of the first interconnections, respectively. The plurality of second interconnections are conductors formed at predetermined intervals in parallel to a second direction orthogonal to the first direction, respectively, to bridge over the gate dielectric films.

A GOA signal determining circuit and method thereof, gate driver circuit, and display device are provided. The GOA signal determining circuit is connected to an input end of a GOA unit, at least two clock signal ends of the GOA unit, and a control end of a reset unit of a PU node in the GOA unit. The GOA signal determining circuit detects a signal of the input end of the GOA unit and a signal of the at least two clock signal ends of the GOA unit, and outputs a control signal to the reset unit of the PU node to control the reset unit to output a reset signal to the PU node to turn off an output transistor of the GOA unit, upon determining both of the signal of the input end and the signal of the at least two clock signal ends are abnormal.

A shift register, a gate driving circuit, and a display device are provided. The shift register includes an input unit, a first control unit, a second control unit, a voltage gating unit, an output unit, an energy storage unit and a reset unit. The shift register can output dual driving signals with fewer switching elements. When it is applied to the gate driving circuit, the total number of switching elements included in the gate driving circuit can be reduced, the wiring can be simplified, and the area occupied by the gate driving circuit can be decreased, thereby facilitating narrowing to the frame of the display device.

A display substrate and a display apparatus are provided, wherein the display substrate includes a display area and a non-display area, wherein the non-display area includes a first bezel area and a transition area, the transition area including a first transition area; the display substrate includes a light emitting drive circuit, a scanning drive circuit, and a control drive circuit; the light emitting drive circuit includes multistage light emitting shift registers, the scanning drive circuit includes multistage scanning shift registers, and the control drive circuit includes multistage control shift registers; the first bezel area includes a first circuit group, the first transition area includes a second circuit group, and the first circuit group and the second circuit group include a Q1-stage light emitting shift register, a Q2-stage scanning shift register, and a Q3-stage control shift register.