The invention introduces a method for testing a storage unit, performed by a processing unit, including at least the following steps: after receiving a test write command from a host device through a first access interface, directing a second access interface to receive a first test pattern from a test writer and program the first test pattern into a PBA (Physical Block Address) of a storage unit; directing the second access interface to read a second test pattern from the PBA of the storage unit and output the second test pattern to a test reader; receiving a test result from the test reader; and generating a test message according to the test result and replying with the test message to the host device.

Semiconductor memory devices are provided. The semiconductor memory device includes an input/output (I/O) drive controller, a data I/O unit and a data transmitter. The input/output (I/O) drive controller generates drive control signals and an input control signal for driving first and second global I/O lines in a first test mode or a second test mode. The data I/O unit drives the first global I/O line in response to an input data when a write operation is executed in the first test mode and to drive the first and second global I/O lines in response to the drive control signals when the write operation is executed in the second test mode. The data transmitter transfers the data on the first global I/O line onto first and second local I/O lines to store the data on the first global I/O line in a memory cell array portion when the write operation is executed in the first test mode. The data transmitter also transfers the data on the first and second global I/O lines onto the first and second local I/O lines to store the data on the first and second global I/O lines in the memory cell array portion when the write operation is executed in the second test mode. Related methods are also provided.

Semiconductor memory devices are provided. The semiconductor memory device includes an input/output (I/O) drive controller, a data I/O unit and a data transmitter. The data I/O unit selectively drives a first global I/O line and first/second global I/O lines according to the first or second test modes. The data transmitter selectively transfers the data on the first global I/O line onto first and second local I/O lines to store the data on the first global I/O line, and the data on the first and second global I/O lines onto the first and second local I/O lines according to the first or second test modes.

Provided is a semiconductor device including a first transmission pad configured to output a data signal; a second transmission pad configured to output a clock signal; a data transmission circuit connected to the first transmission pad and comprising a data driver configured to generate the data signal; a clock transmission circuit connected to the second transmission pad and comprising a clock driver configured to generate the clock signal; a core circuit configured to control the data driver and the clock driver; and at least one buffer, wherein each buffer of the at least one buffer comprises: an input terminal connected to at least one of an output terminal of the data driver and an output terminal of the clock driver; and an output terminal connected to the core circuit.