G11C2207/102

DATA STORAGE DEVICE WITH REWRITEABLE IN-PLACE MEMORY
20180350447 · 2018-12-06 ·

A data storage device may consist of a non-volatile memory connected to a selection module. The non-volatile memory can have a rewritable in-place memory cell that has a read-write asymmetry. The selection module can dedicate a portion of the non-volatile memory to a data map that can be self-contained along with reactively and proactively altered by the selection module.

Data storage device with rewriteable in-place memory

A data storage device may consist of a non-volatile memory connected to a selection module. The non-volatile memory can have a rewritable in-place memory cell that has a read-write asymmetry. The selection module can dedicate a portion of the non-volatile memory to a data map that can be self-contained along with reactively and proactively altered by the selection module.

Data storage device with rewritable in-place memory

A data storage device can have at least a buffer memory, a selection module, and a non-volatile memory. The buffer memory and non-volatile memory may consist of different types of memory while the non-volatile memory has one or more rewritable in-place memory cells. The buffer memory and non-volatile memory may each store data associated with a pending data request as directed by the selection module until a settle time of the rewritable in-place memory cell has expired.

Recordation of data in accordance with data compression method and counting reading of the data in accordance with data counting method
12093190 · 2024-09-17 · ·

In order to record communication data via a communication network, in a storage apparatus in accordance with an appropriate data recording method, a data processing apparatus includes: an obtaining unit configured to obtain communication data including one or more packets continuously communicated via a communication network; a recording unit configured to record the communication data in a storage; and a reading processing unit configured to read the communication data from the storage, wherein the recording unit selects a first data compression method from among a plurality of data compression methods based on compression rate for each data compression method, reading speed of the communication data from the storage, and decompression speed of the communication data required from reading of the communication data to decompression of the communication data in accordance with each compression method, and records the communication data in accordance with the first data compression method.

Data storage device with rewriteable in-place memory

A non-volatile memory may be resident in a data storage device. The non-volatile memory can consist of a rewritable in-place memory cell having a read-write asymmetry. The non-volatile memory may be divided into a first group of tiers with a selection module of the data storage device prior to adapting to an event by altering the non-volatile memory into a second group of tiers. The first and second groups of tiers being different.

Data reduction techniques in a flash-based key/value cluster storage

In one aspect, a method includes splitting empty RAID stripes into sub-stripes and storing pages into the sub-stripes based on a compressibility score. In another aspect, a method includes reading pages from 1-stripes, storing compressed data in a temporary location, reading multiple stripes, determining compressibility score for each stripe and filling stripes based on the compressibility score. In a further aspect, a method includes scanning a dirty queue in a system cache, compressing pages ready for destaging, combining compressed pages in to one aggregated page, writing one aggregated page to one stripe and storing pages with same compressibility score in a stripe.

Compression and Decompression of Data at High Speed in Solid State Storage
20180203797 · 2018-07-19 · ·

Compression and decompression of data at high speed in solid state storage is described, including accessing a compressed data comprising a plurality of blocks of the compressed data, decompressing each of the plurality of blocks in a first stage of decompression to produce a plurality of partially decompressed blocks, and reconstructing an original data from the partially decompressed blocks in a second stage of decompression.

Compression and decompression of data at high speed in solid state storage
09940230 · 2018-04-10 · ·

Compression and decompression of data at high speed in solid state storage is described, including accessing a compressed data comprising a plurality of blocks of the compressed data, decompressing each of the plurality of blocks in a first stage of decompression to produce a plurality of partially decompressed blocks, and reconstructing an original data from the partially decompressed blocks in a second stage of decompression.

Decoding techniques using a programmable priority encoder

A system, computer-readable media, and methods are disclosed for building a decoding table. The system may include one or more registers configured to store a data value based on an order in which one or more lengths were obtained. The system may also include a programmable priority encoder configured to scan the one or more registers for the data value. Further, the system may include a memory configured to store, based on locations of the data value in the one or more registers, at least one of encoding values or letters.

PROVIDING MEMORY BANDWIDTH COMPRESSION IN CHIPKILL-CORRECT MEMORY ARCHITECTURES

Providing memory bandwidth compression in chipkill-correct memory architectures is disclosed. In this regard, a compressed memory controller (CMC) introduces a specified error pattern into chipkill-correct error correcting code (ECC) bits to indicate compressed data. To encode data, the CMC applies a compression algorithm to an uncompressed data block to generate a compressed data block. The CMC then generates ECC data for the compressed data block (i.e., an inner ECC segment), appends the inner ECC segment to the compressed data block, and generates ECC data for the compressed data block and the inner ECC segment (i.e., an outer ECC segment). The CMC then intentionally inverts a specified plurality of bytes of the outer ECC segment (e.g., in portions of the outer ECC segment stored in different physical memory chips by a chipkill-correct ECC mechanism). The outer ECC segment is then appended to the compressed data block and the inner ECC segment.