Patent classifications
G11C2213/35
METHODS FOR ENHANCED STATE RETENTION WITHIN A RESISTIVE CHANGE CELL
A method for improving the stability of a resistive change cell is disclosed. The stability of a resistive change memory cell-that is, the tendency of the resistive change memory cell to retain its programmed resistive state-may, in certain applications, be compromised if the cell is programmed into an unstable or metastable state. In such applications, a programming method using bursts of sub-pulses within a pulse train is used to drive the resistive change cell material into a stable state during the programming operation, reducing resistance drift over time within the cell.
Memory device
According to one embodiment, a memory device includes first to third interconnects, memory cells, and selectors. The first to third interconnects are provided along first to third directions, respectively. The memory cells includes variable resistance layers formed on two side surfaces, facing each other in the first direction, of the third interconnects. The selectors couple the third interconnects with the first interconnects. One of the selectors includes a semiconductor layer provided between associated one of the third interconnects and associated one of the first interconnects, and gates formed on two side surfaces of the semiconductor layer facing each other in the first direction with gate insulating films interposed therebetween.
Select device for memory cell applications
The present disclosure includes select devices and methods of using select device for memory cell applications. An example select device includes a first electrode having a particular geometry, a semiconductor material formed on the first electrode and a second electrode having the particular geometry with formed on the semiconductor material, wherein the select device is configured to snap between resistive states in response to signals that are applied to the select device.
Memory Apparatus and Method of Production Thereof
In accordance with an example embodiment of the present invention, an apparatus is disclosed. The apparatus includes a resistive memory component including an active material and two or more electrodes in electrical contact with the active material of the resistive memory component; and a selector component providing control over the resistive memory component, the selector component including an active material and two or more electrodes in electrical contact with the active material of the selector component. The resistive memory component and the selector component share one or more electrodes, and the resistive memory component and the selector component share at least part of the active material. A method and apparatus for producing the apparatus are also disclosed.
Non-volatile composite nanoscopic fabric NAND memory arrays and methods of making same
A non-volatile nanotube switch and memory arrays constructed from these switches are disclosed. A non-volatile nanotube switch includes a conductive terminal and a nanoscopic element stack having a plurality of nanoscopic elements arranged in direct electrical contact, a first comprising a nanotube fabric and a second comprising a carbon material, a portion of the nanoscopic element stack in electrical contact with the conductive terminal. Control circuitry is provided in electrical communication with and for applying electrical stimulus to the conductive terminal and to at least a portion of the nanoscopic element stack. At least one of the nanoscopic elements is capable of switching among a plurality of electronic states in response to a corresponding electrical stimuli applied by the control circuitry to the conductive terminal and the portion of the nanoscopic element stack. For each electronic state, the nanoscopic element stack provides an electrical pathway of corresponding resistance.
Projected memory device with carbon-based projection component
A projected memory device includes a carbon-based projection component. The device includes two electrodes, a memory segment, and a projection component. The projection component and the memory segment form a dual element that connects the two electrodes. The projection component extends parallel to and in contact with the memory segment. The memory segment includes a resistive memory material, while the projection component includes a thin film of non-insulating material that essentially comprises carbon. In a particular implementation, the non-insulating material and the projection component essentially comprises amorphous carbon. Using carbon and, in particular, amorphous carbon, as a main component of the projection component, allows unprecedented flexibility to be achieved when tuning the electrical resistance of the projection component.
NANO MEMORY DEVICE
A non-volatile memory circuit in embodiments of the present invention may have one or more of the following features: (a) a logic source, and (b) a semi-conductive device being electrically coupled to the logic source, having a first terminal, a second terminal and a nano-grease with significantly reduced amount of carbon nanotube loading located between the first and second terminal, wherein the nano-grease exhibits non-volatile memory characteristics.
THREE-DIMENSIONAL MEMORY ARRAY
An example three-dimensional (3-D) memory array includes a substrate material including a plurality of conductive contacts arranged in a staggered pattern and a plurality of planes of a conductive material separated from one another by a first insulation material formed on the substrate material. Each of the plurality of planes of the conductive material includes a plurality of recesses formed therein. A second insulation material is formed in a serpentine shape through the insulation material and the conductive material. A plurality of conductive pillars are arranged to extend substantially perpendicular to the plurality of planes of the conductive material and the substrate and each respective conductive pillar is coupled to a different respective one of the conductive contacts. A chalcogenide material is formed in the plurality of recesses such that the chalcogenide material in each respective recess is formed partially around one of the plurality of conductive pillars.
Memristor and neuromorphic device comprising the same
Provided are memristors and neuromorphic devices including the memristors. A memristor includes a lower electrode and an upper electrode that are apart from each other and first and second two-dimensional material layers that are arranged between the lower electrode and the upper electrode and stacked without a chemical bond therebetween.
MEMRISTOR HAVING METAL/ION CHANNELS FORMED IN INSULATING LAYER AND RESISTIVE SWITCHING MEMORY DEVICE INCLUDING THE SAME
Provided is a memristor including an active electrode made of a first conductive material including an active metal; an inert electrode spaced from and facing toward the active electrode and made of a second conductive material having an ionization energy greater than the ionization energy of the first conductive material; and a resistive switching layer including: a porous insulating layer disposed between the active electrode and the inert electrode, wherein the porous insulating layer has through-channel holes defined therein extending from a bottom face to a top face thereof; and conductive filaments respectively formed inside the through-channel holes.