Patent classifications
G01R1/0408
High voltage test terminal with guard electrode and guard insulation layer
A high-voltage test terminal includes a first conductor, a second conductor, and a primary insulator disposed between and coupled to the first and second conductors. A blade is movably connected to the second conductor. The blade is electrically and mechanically connected to the first conductor in a first position and electrically isolated and mechanically disconnected from the first conductor in a second position. A guard insulation layer is disposed between the primary insulator and the first conductor.
Scalable tester for testing multiple devices under test
Various embodiments of the invention provide a system and a method for testing one or more devices under test (DUTs) and for checking one or more test setups. Each of the one or more test setups includes a test board having several sockets for receipt of a DUT. A custom hardware interface is used to electrically connect the test board, such as a burn-in board with a test system configuration having multiple modules that can be configured using a computer device and related software to provide customized testing of the DUTs. The system is scalable to accommodate any DUT having any number of channels and to provide customized testing. Results of the testing are sent to the computing device.
SOLDERLESS HIGH CURRENT, HIGH VOLTAGE, HIGH BANDWIDTH TEST FIXTURE
A test fixture for coupling a Device Under Test (DUT) to a measurement instrument includes a device interface board, which may be a solderless, press-fit board, for electrically connecting to one or more DUTs, a power delivery section electrically coupled to the device interface board through a series of electrical contacts, a measurement interface section electrically coupled to the device interface board through a second series of electrical contacts, the measurement interface structured to be coupled to the measurement instrument, and a metal plate coupled between and providing an electrical return path between the measurement interface and the power delivery section. The metal plate is sized and shaped to provide physical protection from DUTs that are destroyed during testing.
CHIP TESTING SYSTEM
A chip testing system including a tray kit, an insertion member mounting apparatus, a testing apparatus, an insertion member detaching apparatus, and a conveying apparatus are provided. The chip tray kit includes a tray, a plurality of chip fixing members, and a plurality of auxiliary insertion members. The chip fixing members are fixed to the tray and are configured to carry a plurality of chips. The insertion member mounting apparatus can fix the auxiliary insertion members to a side of the chip fixing members, and the auxiliary insertion members can limit a movement range of the chips in the chip fixing members. The insertion member detaching apparatus can detach the auxiliary insertion members. When the chips are tested, a pressing assembly connected to a temperature adjusting device and reaching a predetermined temperature correspondingly presses a surface of each of the chips.
Electrical characteristic measuring device for semiconductor device
An electrical characteristic measuring device (70) comprises an evaluation table (30) on which a semiconductor device (10) is to be placed, and a device pressing member (20) to press the device (10). The pressing member (20) comprises a non-conductive electrode pressing part (22) to press a device electrode part (12) and a flange pressing part (23) to press a flange portion (14) of a base material (11). In a flange contact part (42) of the flange pressing part (23), a surface facing the flange portion (14) of the base material (11) has the same shape as a flange facing surface of a screw head of a screw (16) for fastening to an apparatus on which the device 10 is to be mounted. When the device (10) is pressed against the evaluation table (30) by the pressing member (20), the flange pressing part (23) is placed at a position of the base material (11) corresponding to a position of a fastening portion (17) in which a screw insertion groove (15) is included and in which the screw (16) is fastened to the base material (11).
Contactor for testing electronic device
An electronic device having a structure that electrically connects the contactor to an electronic device during a testing process is disclosed. The contactor includes a holder for accommodating the electronic device during the testing process; a flexible circuit, having a first set of contacts electrically connected to the corresponding electrode terminals of the electronic device, and a second set of contacts electrically connected to a control unit that sends test signals during the test process; an elastomer, for adjusting the pressure between the first set of contacts of the flexible circuit and the corresponding electrode terminals of the electronic device while being pressed together; and an alignment tool, for aligning the first set of contacts with the corresponding electrode terminals of the electronic device. The electrode terminals of the electronic device are located on the same surface of the electronic device and the flexible circuit is detachable from the contactor.
MECHANICAL RELIABILITY TESTING PLATFORM AND TESTING METHOD FOR TRI-POST INSULATORS IN GIL DEVICE
A mechanical reliability testing platform for tri-post insulators in a GIL device includes a horizontal-GIL-arrangement-form fixed-tri-post-insulator mechanical reliability verification testing platform for a horizontal dynamic insertion and extraction test, and a turning-GIL-arrangement-form fixed-tri-post-insulator mechanical reliability verification testing platform for a vertical dynamic insertion and extraction test. A driving unit is employed to realize the insertion and extraction of the conducting rod of the sliding-tri-post-insulator GIL form unit at the contact holder, so as to simulate the reciprocating forces on the fixed tri-post insulator induced by the thermal expansion and contraction of the pipe during the actual operation of the GIL, and simulate the working condition of the fixed tri-post insulator under abnormal forces when the GIL experience foundation settlement.
Semi-automatic prober
A wafer probe station system for reliability testing of a semiconductor wafer. The wafer probe station is capable of interfacing with interchangeable modules for testing of semiconductor wafers. The wafer probe station can be used with different interchangeable modules for wafer testing. Modules, such as probe card positioners and air-cooled rail systems, for example, can be mounted or docked to the probe station. The wafer probe station is also provided with a front loading mechanism having a rotatable arm that rotates at least partially out of the probe station chamber for wafer loading.
Test device, test method, and memory medium
A test device for testing a needle mark generated in an electrode formed in a test object when a probe needle contacts the electrode includes an imaging part having a binning function, and a controller configured to control at least the imaging part. The controller is configured to perform a high-speed low-precision test process of imaging the electrode, after a contact operation by the probe needle, by the imaging part whose binning function is on, and determining a state of the needle mark of the electrode, based on an imaging result, and a low-speed high-precision test process of imaging the electrode again by the imaging part whose binning function is off, according to a determination result in the high-speed low-precision test process, and determining a state of the needle mark of the electrode imaged again, based on an imaging result.
THIN-FILM PROBE CARD AND TEST MODULE THEREOF
A thin-film probe card and a test module thereof are provided. The test module includes a carrying unit, a plurality of vertical probes fixed in position by the carrying unit, an elastic cushion disposed on the carrying unit, and a thin sheet. The thin sheet includes a carrier partially disposed on the elastic cushion, a plurality of signal circuits disposed on the carrier, and a plurality of electrically conductive protrusions that are respectively formed on the signal circuits. An end of the vertical probes is arranged at an inner side of the electrically conductive protrusions and is coplanar with free ends of the electrically conductive protrusions.