The present invention provides a battery status detection method, which includes the following steps: iteratively executing the following steps: obtaining a current voltage value and a previous voltage value of a battery; calculating a difference between the current voltage value and the previous voltage value; adjusting a low battery state indicator according to the difference; and determining whether to output a low battery warning signal according to the low battery state indicator.

Fault detection system and method each includes a positive input line configured to connect between a voltage input and a load and a negative input line configured to connect between the voltage input and the load. A logic module is operatively connected to and/or configured to detect a fault (e.g., a short circuit) in either of the positive input line or the negative input line between the voltage input and the load.

A circuit for battery detection including a power-on reset (POR) block, an analog-to-digital converter (ADC) circuit, a switch circuit, and a logic control circuit is provided. The POR block is coupled to a node and is configured to output an output voltage with logic high level or logic low level when the node has a battery voltage higher or lower than a preset value, respectively. The switch circuit is coupled to the logic control circuit and the ADC circuit. The logic control circuit is coupled to the POR block and is configured to generate a control signal with the logic low level when the output voltage is at the logic low level, so that the switch circuit disconnects the ADC circuit and the node, and the ADC circuit does not read the battery voltage.

A communication circuit with reduced kickback noise of an eye opening monitor may include a first sampler, a second sampler, and a preamplifier, wherein when an edge of a sub-clock precedes an edge of a main clock, the first sampler samples a data value by comparing the input signal with a second reference voltage at the edge of the sub-clock, and the second sampler samples a data value by comparing the input signal with a first reference voltage at the edge of the main clock, and when the edge of the sub-clock lags the edge of the main clock, the second sampler samples a data value by comparing the input signal with the second reference voltage at the edge of the sub-clock, and the first sampler samples a data value by comparing the input signal with the first reference voltage at the edge of the main clock.

A voltage detection circuit includes: a self-bias unit, generating a self-bias voltage based on a reference voltage; and detection units, comparing magnitudes of each voltages as a detection target and a reference voltage, and outputting first to n.sup.th voltage detection signals indicating whether the voltage is higher than the reference voltage. Each detection units includes: fifth and sixth transistors, respective drains being connected, and, with respective gates receiving one of the voltages, the fifth and sixth transistors outputting a voltage generated at the respective drains as one of the voltage detection signals; seventh and eighth transistors, respectively supplying a current corresponding to the self-bias voltage to the fifth and sixth transistors. The voltage detection circuit includes a current source transistor, causing an operating current based on a bias voltage received by the gate to flow through the self-bias unit and the detection units.

The present disclosure relates to a voltage detection apparatus and method for determining whether a high voltage at an input terminal exceeds a preset value. The device includes a high-voltage arm and a low-voltage arm, and the low-voltage arm includes a capacitor charging/discharging module, a signal indication module, a threshold selection module, a control module, a signal transmission module, and a signal processing module. The high-voltage arm includes a precision resistor R1, the capacitor charging/discharging module includes a charging/discharging capacitor C1 and a diode VD2, the signal indication module includes an optical-fiber emitting diode V1 and a voltage stabilizing diode VD, the threshold selection module includes four parallel resistors and corresponding switch contacts S1, S2, S3, and S4 thereof, the control module includes a comparator D1 and a transistor switch VT1 controlled by D1, and the signal transmission module includes one optical-fiber emitting diode V2 and one optical-fiber emitting diode V3 connected in series; the signal processing module is an upper computer or an optical signal acquisition system. The apparatus in the present disclosure has a long-term high voltage resistance, detects a high voltage at an input terminal, compares the same with a threshold voltage, and transmits and displays a comparison result, so as to provide a logical basis of determination for reliable operation of a circuit breaker.

A power detection circuit includes a power detector that detects output power of a power amplifier and outputs in two ways of a voltage output and a current output as a detection result, and a voltage comparison circuit that compares the voltage output of the power detector with a predetermined reference voltage and outputs a power detection signal that is at a level "H" in a case where the voltage output is higher than the reference voltage and is at a level "L" in a case where the voltage output is lower than the reference voltage.