Patent classifications
G01R31/2632
SYSTEM-IN-PACKAGE AND ELECTRONIC MODULE INCLUDING THE SAME
A system-in-package includes a function circuit and a protection circuit that protects the function circuit by preventing an instantaneous transient voltage from being applied to the function circuit. Here, the protection circuit includes a TVS diode and a capacitor. The TVS diode includes an anode that receives a ground voltage and a cathode that is connected to a first external connection terminal. The capacitor includes a first terminal that is connected to a second external connection terminal electrically separated from the first external connection terminal and a second terminal that receives the ground voltage.
CIRCUIT FOR DETECTING PIN-TO-PIN LEAKS OF AN INTEGRATED CIRCUIT PACKAGE
Techniques and apparatuses are provided for detecting a short circuit between pins of an integrated circuit package. The tested pins can be adjacent or non-adjacent on the package. Various types of short circuits can be detected, including resistive, diode and capacitive short circuits. Additionally, short circuits of a single pin can be tested, including a short circuit to a power supply or to ground. The test circuit includes a current mirror, where the input path has a first path connected to a first pin and a parallel second path connected to a second pin. A comparator is connected to the output path of the current mirror. By controlling the on and off states of transistors in the first and second paths, and evaluating the voltage of the output path, the short circuits can be detected.
Circuit for detecting pin-to-pin leaks of an integrated circuit package
Techniques and apparatuses are provided for detecting a short circuit between pins of an integrated circuit package. The tested pins can be adjacent or non-adjacent on the package. Various types of short circuits can be detected, including resistive, diode and capacitive short circuits. Additionally, short circuits of a single pin can be tested, including a short circuit to a power supply or to ground. The test circuit includes a current mirror, where the input path has a first path connected to a first pin and a parallel second path connected to a second pin. A comparator is connected to the output path of the current mirror. By controlling the on and off states of transistors in the first and second paths, and evaluating the voltage of the output path, the short circuits can be detected.
METHOD FOR CONTROLLING THE ROTATIONAL SPEED OR THE TORQUE OF A MOTOR, ROTATIONAL SPEED CONTROL SYSTEM AND CONTROL DEVICE
A method for controlling the rotational speed or the torque of a motor to protect a suppressor diode in a control device of a vehicle, wherein the suppressor diode converts recuperation energy of the motor into thermal energy comprises determining the current junction temperature and/or diode voltage of the suppressor diode; and controlling the rotational speed or the torque of the motor by means of the current junction temperature and/or diode voltage in such a way that the junction temperature of the suppressor diode does not exceed a predetermined junction temperature limit value.
Test circuit for detecting parasitic capacitance of TSV
Disclosed herein is an apparatus that includes a first semiconductor chip, and a first TSV penetrating the first semiconductor chip. The first semiconductor chip includes a first resistor coupled between a first power supply and a first node, a switch circuit coupled between the first node and the first TSV, a pad electrode operatively coupled to the first node, and a constant current source operatively coupled to either one of the first node and the pad electrode.
Screening method for pin diodes used in microwave limiters
A method of testing a PIN diode for a power limiter circuit comprises measuring a reverse bias current of the PIN diode; applying a reverse bias voltage to the PIN diode; increasing the reverse bias voltage until the reverse bias current of the PIN diode reaches a threshold current indicative of a reverse voltage breakdown; and determining whether the reverse bias breakdown voltage of the PIN diode is within an acceptable range of reverse bias breakdown voltages corresponding to a power range at which the power limiter circuit would enter power limiting mode with the PIN diode.
DISPLAY DEVICE AND INSPECTING METHOD THEREOF
An exemplary embodiment of the present inventive concept provides a display device including: a display area where an image is displayed; a peripheral area disposed outside the display area; a hole area disposed within the display area; a hole crack detection line disposed adjacent to the hole area to surround the hole area and having a first end and a second end that is separated from the first end; a first detection line extending from the peripheral area and connected to the hole crack detection line to constitute a first closed circuit; a second detection line extending from the peripheral area and connected to the hole crack detection line to constitute a second closed circuit; and a circuit portion connected to the first detection line and the second detection line
DISPLAY DEVICE AND INSPECTING METHOD THEREOF
An exemplary embodiment of the present inventive concept provides a display device including: a display area where an image is displayed; a peripheral area disposed outside the display area; a hole area disposed within the display area; a hole crack detection line disposed adjacent to the hole area to surround the hole area and having a first end and a second end that is separated from the first end; a first detection line extending from the peripheral area and connected to the hole crack detection line to constitute a first closed circuit; a second detection line extending from the peripheral area and connected to the hole crack detection line to constitute a second closed circuit; and a circuit portion connected to the first detection line and the second detection line
Pin driver and test equipment calibration
A force-sense system can provide signals to, or receive signals from, a device under test (DUT) at a first DUT node. The system can include output buffer circuitry configured to provide a DUT signal to the DUT in response to a force control signal at a buffer control node, and controller circuitry configured to provide the force control signal at the buffer control node. The system can include bypass circuitry configured to selectively bypass the controller circuitry and provide an auxiliary control signal at the buffer control node. The auxiliary control signal can be used for system calibration. In an example, an external calibration circuit can provide the auxiliary control signal in response to information received from the DUT.
Device for testing a satellite solar array
A test device for testing a solar generator of a satellite or solar drone, the solar generator includes an array of solar cells, each junction being capable of converting photons of a respective wavelength band into electric current, the test device includes: an array of light sources including at least one row of light sources, wherein each light source emits light in each of the electrical conversion wavelength bands of the junction(s) of the solar cells, and a control unit for the array of light sources, and capable of controlling the turning on and off of each of the light sources of the array individually, wherein the array of light sources selectively illuminates each solar cell of the solar generator by turning on one or more light sources of the array, with the solar cell receiving an irradiance that is greater than at least 130W/m.sup.2.