Patent classifications
G01R31/2632
Semiconductor test circuit, semiconductor test apparatus, and semiconductor test method
A semiconductor test circuit, apparatus, and method having a first relay disposed between a power supply and a switching element, a second relay disposed between a connection point of the switching element and a reverse conducting-insulated gate bipolar transistor (RC-IGBT) chip and a snubber circuit, a third relay disposed between the switching element and the RC-IGBT chip and a coil, and a fourth relay disposed between a diode and the switching element. A turn on/off test of an IGBT portion is performed by turning on the second and fourth relays. An avalanche test of the IGBT portion is performed by turning on the second relay. A short-circuit test of the IGBT portion is performed by turning on the first relay. A recovery test of an FWD portion is performed by turning on the first and third relays. At this time probes are brought into contact with electrodes once.
PASSIVE HARMONIC FILTER POWER QUALITY MONITOR AND COMMUNICATIONS DEVICE
A method and apparatus for detection of a failure of a rectifier connected to a passive harmonic filter with a tuned circuit reactor, or of the filter itself, and for generating system currents in the filter, using low cost voltage sensing, modeling of reactor resistance and saturable inductance, and a mathematical integration. The harmonic spectrum of the rectifier current is used to determine an estimate of the rectifier impedance. A template of expected rectifier current is calculated, and compared against a rectifier current calculated on the basis of sensed voltages, to generate a difference signal. The difference signal is compared against a predetermined fault threshold to determine if an error has occurred. The apparatus includes a DSP obtaining the voltages of the source and load, and the tuned circuit reactor voltage, calculating the template, and comparing the actual voltages with the template, to annunciate a fault.
TRANSIENT VOLTAGE SUPPRESSOR BIT STIMULATION
A transient voltage suppressor (TVS) can include an input line, a return line, and a plurality of TVS diodes disposed in series between the input line and the return line. The TVS can include a switch assembly operatively connected to the plurality of TVS diodes and configured to bypass at least one of the plurality of TVS diodes to allow a remainder of the plurality of TVS diodes to be tested at a voltage that is lower than if the switch assembly were not employed.
POWER TRANSISTOR JUNCTION TEMPERATURE DETERMINATION USING A DESATURATION VOLTAGE SENSING CIRCUIT
A measurement circuit device for a vehicle includes a power transistor and a voltage measurement circuit coupled to the power transistor that measures a voltage across the power transistor. The measurement circuit device also includes a microcontroller that determines a junction temperature using the measured voltage and adjusts a capacity of the power transistor based on the determined junction temperature. In some embodiments, the measurement circuit device may include a clamping device that clamps the voltage across the transistor when the transistor is off. The measurement circuit device may also include an analog-to-digital converter that converts the measured voltage from an analog value to a digital value.
Structure and testing device for measuring the bonding strength of the light-emitting panel
The structure and the testing device used for measuring the bonding strength of the light-emitting panel, including: a substrate, a flip chip film is disposed on the substrate, and a bonding portion of the flip chip film is bonded to the substrate. Wherein an orthographic projection of a non-bonding portion of the flip chip film on the substrate covers an orthographic projection of the bonding portion on the substrate, and the non-bonding portion is stretched to measure a bonding strength between the flip chip film and the substrate, thereby reducing the risk of breakage between the layers inside the substrate, thereby the bonding strength between the flip chip film and the substrate can be measured more accurately.
AN ASYMMETRICAL PN JUNCTION THERMOELECTRIC COUPLE STRUCTURE AND ITS PARAMETER DETERMINATION METHOD
The present invention discloses an asymmetrical PN junction thermoelectric couple structure and its parameter determination method. By changing the structural parameters of p-type semiconductor or n-type semiconductor, the current generated by p-type semiconductor is equal to the current generated by the n-type semiconductor, so that the high-efficiency output of PN junction thermoelectric couple can be realized. Meanwhile, the present invention provides a method for determining the parameters of PN junction based on the numerical solution method. Finally, the optimal size parameters of PN junction are obtained.
Passive harmonic filter power quality monitor and communications device
A method and apparatus for detection of a failure of a rectifier connected to a passive harmonic filter with a tuned circuit reactor, or of the filter itself, using low cost voltage sensing, modeling of reactor resistance and saturable inductance, and a mathematical integration. The harmonic spectrum of the rectifier current is used to determine an estimate of the rectifier impedance. A template of expected rectifier current is calculated, and compared against a rectifier current calculated on the basis of sensed voltages, to generate a difference signal. The difference signal is compared against a predetermined fault threshold to determine if an error has occurred. The apparatus includes a DSP obtaining the voltages of the source and load, and the tuned circuit reactor voltage, and configured to compare the currents calculated from the actual voltages with the currents in the template, and to thereby determine whether to annunciate a fault.
Method for determining a junction temperature of a device under test and method for controlling a junction temperature of a device under test
The present disclosure provides a method for controlling a junction temperature of a device under test, including applying a reverse bias to a reference diode adjacent to the device under test, obtaining a calibration current of the reference diode under the reverse bias, deriving the junction temperature of the device under test according to the reference diode, and adjusting an environment temperature when the junction temperature of the device under test is deviated from a predetermined value by a predetermined temperature range.
METHOD FOR DETERMINING A JUNCTION TEMPERATURE OF A DEVICE UNDER TEST AND METHOD FOR CONTROLLING A JUNCTION TEMPERATURE OF A DEVICE UNDER TEST
The present disclosure provides a method for controlling a junction temperature of a device under test, including applying a reverse bias to a reference diode adjacent to the device under test, obtaining a calibration current of the reference diode under the reverse bias, deriving the junction temperature of the device under test according to the reference diode, and adjusting an environment temperature when the junction temperature of the device under test is deviated from a predetermined value by a predetermined temperature range.
Control and Prognosis of Power Electronic Devices Using Light
An optically-monitored and/or optically-controlled electronic device is described. The device includes at least one of a semiconductor transistor or a semiconductor diode. An optical detector is configured to detect light emitted by the at least one of the semiconductor transistor or the semiconductor diode during operation. A signal processor is configured to communicate with the optical detector to receive information regarding the light detected. The signal processor is further configured to provide information concerning at least one of an electrical current flowing in, a temperature of, or a condition of the at least one of the semiconductor transistor or the semiconductor diode during operation.