Patent classifications
G01R31/2653
Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cell
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic block
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
Metal pattern inspection method and focused ion beam apparatus
A metal pattern inspection method which applies a pulsed voltage to a metallic pattern, sets a cycle of the pulsed voltage to be shorter than a scanning cycle in which a focused ion beam is swept, indicating only a region of a secondary charged particle image corresponding to a portion of the metallic pattern which is isolated by a wire breakage and to which the pulsed voltage is applied in the form of a first pattern created as a function of surface electrical potentials changing in level with time, detecting, as a disconnection, a boundary between the first pattern and a second pattern created as a function of surface electrical potentials not changing in level with time, and determining whether there is a breaking of or a short circuit in the metallic pattern based on the presence or absence of the disconnection.
Optimal determination of an overlay target
There are provided systems and methods comprising obtaining design data of each of a plurality of given overlay targets comprising a plurality of stacked layers, using at least part of the design data to simulate image data of each given overlay target that would have been acquired by an electron beam examination system, using the image data to determine, before actual manufacturing of each given overlay target, second data informative of estimated probability that each given overlay target, upon being manufactured according to the design data, provides measurement data in an overlay measurement process meeting a measurement quality criterion, and using the second data of each given overlay target to select at least one optimal overlay target among the plurality of different overlay targets, wherein the at least one optimal overlay target is usable to be actually manufactured on the semiconductor specimen.
INSPECTION APPARATUS AND METHOD
A method includes: providing a first semiconductor device including a backside interconnection structure, the first semiconductor device being formed by a semiconductor process; and generating a physical failure analysis model by an inspection process. The inspection process includes: directing an electron beam toward the frontside of the first semiconductor device; and applying an electrical signal to an electrical contact of the first semiconductor device through an electrical path that goes through a shunt board attached to a switchable interface trace bank, the electrical contact being associated with a position of the electron beam. The method further includes: generating a parameter of a revised semiconductor process according to the physical failure analysis model and the semiconductor process; and forming a second semiconductor device by the revised semiconductor process using the parameter.
SYSTEMS, DEVICES, AND METHODS FOR PERFORMING A NON-CONTACT ELECTRICAL MEASUREMENT ON A CELL, NON-CONTACT ELECTRICAL MEASUREMENT CELL VEHICLE, CHIP, WAFER, DIE, OR LOGIC BLOCK
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
SYSTEMS, DEVICES, AND METHODS FOR ALIGNING A PARTICLE BEAM AND PERFORMING A NON-CONTACT ELECTRICAL MEASUREMENT ON A CELL AND/OR NON-CONTACT ELECTRICAL MEASUREMENT CELL VEHICLE USING A REGISTRATION CELL
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
DETECTION METHOD OF MOS TRANSISTOR
A detection method of a metal-oxide-semiconductor (MOS) transistor is provided. The detection method includes the following steps. A MOS transistor is provided, wherein a source and a drain of the MOS transistor are each connected to a contact. The contacts are removed to form contact holes exposing the source and the drain. The source and the drain are removed through the contact holes to form recesses. The contact holes and the recesses are filled with a protective material. The cross-sectional profiles of the recesses are obtained. It is determined whether the MOS transistor is failed according to the cross-sectional profiles of the recesses.
Inspection apparatus and method
A method includes: providing a first semiconductor device including a backside interconnection structure, the first semiconductor device being formed by a semiconductor process; and generating a physical failure analysis model by an inspection process. The inspection process includes: directing an electron beam toward the frontside of the first semiconductor device; and applying an electrical signal to an electrical contact of the first semiconductor device through an electrical path that goes through a shunt board attached to a switchable interface trace bank, the electrical contact being associated with a position of the electron beam. The method further includes: generating a parameter of a revised semiconductor process according to the physical failure analysis model and the semiconductor process; and forming a second semiconductor device by the revised semiconductor process using the parameter.
OPTIMAL DETERMINATION OF AN OVERLAY TARGET
There are provided systems and methods comprising obtaining design data of each of a plurality of given overlay targets comprising a plurality of stacked layers, using at least part of the design data to simulate image data of the given overlay target that would have been acquired by an electron beam examination system, using the image data to predict, before actual manufacturing of each given overlay target, one or more given attributes informative of quality of one or more images of the given overlay target after being manufactured according to the design data, and using the one or more given attributes determined for each given overlay target to select at least one optimal overlay target among the plurality of different overlay targets, wherein the at least one optimal overlay target is usable to be actually manufactured on the semiconductor specimen.