A method for indicating a probing target for a fabricated electronic circuit including: generating an electronic, three-dimensional model based on manufacturing layout information of a fabricated circuit; obtaining, with a vision system, visual environment information for the fabricated circuit; scaling and orienting the three-dimensional model by a scaler and mapper based on the visual environment information; overlaying the three-dimensional model with the visual environment information to produce a correlated image; obtaining an identification of a desired network node of the fabricated circuit; and indicating a probing target, the probing target corresponding to the desired network node of the fabricated circuit.

An electronic apparatus includes: an electronic module; and a flexible substrate electrically connected to the electronic module. The flexible substrate includes: a base film; a plurality of first contact pads arranged at one end on the base film in a first direction, and electrically connected to the electronic module; a plurality of second contact pads arranged at an other end on the base film in the first direction; a plurality of first wires arranged on the base film, and each electrically connecting one of the first contact pads and one of the second contact pads together, and a plurality of third contact pads arranged on the base film, each of the third contact pads being positioned along the first direction between one of the first contact pads and one of the second contact pads, and being electrically connected to one of the first wires.

A method of securing a probe tip to a device under test (DUT), the method comprising: positioning the probe tip near a test point of the DUT, the probe tip comprising a connection point on a signal-path portion of the probe tip and an attachment tab, the connection point making an electrical connection with the test point of the DUT, the attachment tab extending away from the signal-path portion of the probe tip; applying an adhesive to the DUT through a hole in the attachment tab of the probe tip; and curing the adhesive to secure the probe tip to the DUT.

Apparatus, systems, and methods for progressive corrosion detection are disclosed. An example apparatus includes a query generator to query a multiplexer channel to receive an output voltage, the multiplexer channel linked to a fin group of an electrode array, the fin group forming an open circuit in the absence of conductive crystal formation, a quantifier to determine, using a reference voltage, a difference between the reference voltage and the output voltage from the queried multiplexer channel, and a contamination level comparator to identify presence of conductive crystal formation based on the difference between the reference voltage and the output voltage.

A test array structure includes a substrate, first and second cells, first and second bit-line rings and four word-lines. Each of the first and second cells has a first drain region, a first gate region, a source region, a second gate region and a second drain region connected together in sequence. The first drain region and the first gate region of the first cell are located within the first bit-line ring. The second drain region and the second gate region of the first cell are located between the first and second bit-line rings. The first drain region and the first gate region of the second cell is located within the second bit-line ring. The second drain region of the first cell and the first drain region of the second cell are located between the two immediately-adjacent word-lines.

A drive device comprises a sensor for detecting a state of stress applied to a power transistor, a threshold voltage setting circuit for outputting a threshold voltage, an anomaly monitor circuit for determining whether or not a state of stress is abnormal by comparing a detected voltage of the sensor with the threshold voltage, and a control circuit for fixing the power transistor to either on or off when the state of stress is determined to be abnormal by the anomaly monitor circuit. When an operating mode is a test mode, the control circuit tests whether the anomaly monitor circuit determines the state of the stress is abnormal or not by switching a level of the threshold voltage set by the threshold voltage setting circuit so as to determine that a state of the stress applied to the power transistor is abnormal in the normally operating anomaly monitor circuit.

A method for testing mass-produced PCBs and other electronic components more efficiently, the method includes setting testing parameters based on historical test data and a target decision index, obtaining a first specified number of the target objects to have the full test, and calculating a first yield based on the current test result. The method determine whether the first yield is less than the first yield threshold yield, and obtaining a second specified number of the target objects from the remaining target objects to have the full test, and calculate a second yield when the first yield is larger than or equal to the first yield threshold value. The method further determine whether the second yield is less than the second yield threshold value according to a second comparing command and select some of the remaining target objects to have a sampling test.

An automatic circuit board test system includes at least one switch module of board under test connected with a test board, a control module and a test process module. The test board includes a first signal interface, a second signal interface and a third signal interface and a repeater. The second signal interface and the third signal interface are mutually connected by a signal cable. The first signal interface is connected with the repeater. The at least one switch module of board under test is connected with the second signal interface and the third signal interface. The control module is connected with the at least one switch module of board under test. The control module controls the at least one switch module of board under test. The test process module is connected with the control module and the first signal interface by at least two serial port buses.

A circuit for detection and warning of electro-migration in a region on a printed circuit board between a first electrically conductive element having a first electrical characteristic and a second electrically conductive element having a second electrical characteristic different than the first. The circuit includes an electrically conductive guard track that is electrically isolated from the first and second elements in the region and has a normal condition electrical characteristic based on the first and second characteristics. The circuit includes an electrical characteristic supervisor to detect an electrical characteristic of the guard track. In response to electro-migration creating an electrical connection of the guard track to the first or second element, the guard track has an abnormal condition electrical characteristic different than the normal condition. In response to detecting the abnormal condition of the guard track, the supervisor effectuates a warning of electro-migration in the region.

A method for detecting errors or malfunctions in electrical or electronic components of circuits, wherein each of the circuits is located on a circuit board and wherein a plurality of circuit boards border one another on a circuit board panel, includes populating each of the circuit boards of the circuit board panel with electrical or electronic components corresponding to the circuits; for each of the analog, electrical or electronic components used for the construction of the circuits, placing a corresponding test component in an edge region of the circuit board panel; providing the analog, electrical or electronic test components placed in the edge region of the circuit board panel with test points; and checking for the correct function value and/or the correct poling of the analog, electrical or electronic test components provided with test points and located in the edge region of the circuit board panel.