One embodiment is a transport apparatus for moving carriers of microelectronic devices along a track, the transport apparatus including: (a) a track with two rails adapted to support the carriers; (b) a trolley adapted to be transported in a direction along the track by a linear actuator; and (c) a first and a second engagement feature attached to the trolley wherein the first engagement feature is adapted to engage temporarily with a first of the carriers, and the second engagement feature is adapted to engage temporarily with a second of the carriers; wherein a predetermined movement of the trolley slidably moves the first carrier onto a test position and slidably moves the second carrier off the test position simultaneously.

A test handler includes a pusher which includes a pusher end which comes into contact with a DUT (Device Under Test) to transfer heat, and a pusher body which conducts heat to the pusher end, the pusher end separating a test tray for fixing the DUT and the pusher body from each other; a porous match plate including a pusher arrangement region in which the pusher body is placed, and a plurality of holes placed adjacent to the pusher arrangement region; a heater placed on an upper surface of the porous match plate to control temperature of the pusher; and an airflow input port placed on the heater to provide the airflow to the plurality of holes, in which the airflow passes through the plurality of holes and passes through a separated space between the test tray and the pusher body.

Embodiments of the present invention provide an automated test equipment (a “tester”) for testing a device under test, including a bidirectional dedicated real-time handler interface. Some embodiments include an interface having a trigger function, a fixed endpoint interface, an interface arranged on a test head, and/or a number of lines/communication channels adapted to a specific communication task, without separate signal lines, for example. The bidirectional dedicated real-time handler interface can be used to transmit a synchronization signal or other information to the handler in real-time, and the transmitted signal can be test site specific. The real-time signaling advantageously improves testing accuracy and efficiency.

In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing fast throughput die handling for synchronous multi-die testing. For instance, there is disclosed in accordance with one embodiment a device handler for testing functional silicon devices, the device handler including: a plurality of test interface units to electrically interface to the functional silicon devices for test; a plurality of thermal actuators, each being individually movable upon at least three axes; an optical alignment unit with a plurality of pick and place head pairs, in which the optical alignment unit is to move upon a horizontal plane and is to move between the plurality of test interface units and the plurality of thermal actuators; an upward facing camera to move with the optical alignment unit, the upward facing camera to optically locate a position of the plurality of test interface units; a plurality of downward facing cameras, each to optically locate a position of one of the plurality of functional silicon devices to be tested upon one of the plurality of thermal actuators; in which the device handler is to move the optical alignment unit out from between the plurality of test interface units and the plurality of thermal actuators; and in which the device handler is to align test probes affixed to the test interface units with the plurality of functional silicon devices to be tested and electrically interface the test probes with the functional silicon devices for testing. Other related embodiments are disclosed.

A tray carrier includes a base plate having a first and second pairs of opposed sides as well as opposed first and second surfaces. Channel-shaped corner members provide containment formations for trays stacked at the first surface of the base plate. Tray carrier gripping cavities provided in the first pair of opposed sides can be engaged by gripping formations of an automated gripper to facilitate gripping the tray carrier. Raised portions at the first surface of the base plate provide a tray-gripping space engaged by gripping formations of the automated gripper to facilitate gripping trays stacked at the first surface of the base plate. Handle members at the second sides of the base plate facilitate manual handling of the tray carrier, and a pair of opposed recesses in the first sides of the base plate provide a narrowed intermediate portion of the base plate for manual handling of trays.

A chip tray, comprising: a first plate configured to allow a plurality of semiconductor elements to be placed thereon, a positioning and clamping mechanism for pressing and holding the semiconductor elements in predetermined locations on the first plate, and actuator means for actuating the positioning and clamping mechanism comprising movable parts of the positioning and clamping mechanism which can be actuated simultaneously to perform a pressing and holding operation and a releasing operation by the positioning and clamping mechanism simultaneously for all the semiconductor elements, wherein the positioning and clamping mechanism comprises a second plate which is laterally shiftable and lockable with respect to the first plate and comprises a plurality of openings and of elastic members each corresponding to an opening and each provided with a pressure piece adapted for abutting against at least one edge of one of the semiconductor elements, characterized in that wherein the elastic members are self-guiding elements mounted on a surface of the second plate, and elastically deformable in a plane parallel to the plane of the second plate in a self-guiding manner.

A method for testing at least one single chip in a wafer probing system, at least comprising: providing an adapter plate having an interface surface for contacting a vacuum chuck of the wafer probing system, the adapter plate being configured to accommodate the at least one single chip in a cutout with a chip rear surface being flush with the interface surface; loading the adapter plate with the at least one single chip into the wafer probing system; determining an exact position of the at least one single chip in the adapter plate in the search area; and testing the at least one single chip with test routines stored in a controller of the wafer probing system. A device and an adapter plate for testing at least one single chip in a wafer probing system

Provided is a handler apparatus that conveys a device under test to a test socket, including: a socket for adjustment which, prior to fitting of a device holder holding the device under test to the test socket, fits the device holder; a socket-for-adjustment position detecting section that detects a relative position of the device under test with respect to the socket for adjustment, in a state in which the device holder fits the socket for adjustment; an actuator that adjusts a position of the device under test on the device holder, based on the detected relative position of the device under test; and a conveyer that conveys the device holder, in which a position of the device under test has been adjusted, to fit the test socket.

A vision alignment system for a test handler system includes a transfer mechanism that transfers a device from an input side to a test side, a contactor array positioned at the test side, and a pick-and-place device that moves the device from the transfer mechanism to the contactor array. An engagement mechanism on the pick-and-place device engages with alignment devices on the transfer mechanism and contactor array. To avoid positioning the vision alignment system in the test side, a first vision mechanism is positioned away from the test socket and determines the position of the device in a common local coordinate system, a second vision mechanism is positioned at an output side and determines a position of the contactor array in the local coordinate system, and the correction mechanism corrects a position of the device based on an offset between the positions in the coordinate system.

There is provided an electronic component handling apparatus which can be reduced in size or can improve the throughput when the number of contact arms is increased. A handler comprises: a plurality of contact arms which are arrayed along a first direction, each of the plurality of contact arms including a holding part which holds a DUT and including an adjustment unit which moves the holding part relative to a base part of each contact arm; an imaging unit capable of imaging the DUT and the holding part; an operation unit which operates the adjustment unit; and a moving unit which moves the imaging unit and the operation unit along an X direction. The adjustment unit adjusts the relative position of the holding part according to an operation of the operation unit.