Provided are an inspection jig and an inspection apparatus in which a configuration for bending a plurality of contacts in the same direction can be simplified. The inspection jig includes a plurality of contacts each of which has a rod shape, a first support portion that supports the first end portion side of the plurality of contacts, and a second support portion that supports the second end portion side of the plurality of contacts. The first support portion includes a facing support plate that is disposed to face the second support portion in a manner separated from the second support portion and has a plurality of through holes through which the plurality of contacts are inserted, and a cross section of each of the through holes has an elliptical shape whose major axis extends in a predetermined specific direction along a plane direction of the facing support plate.

An integrated circuit package and a method of forming the same are provided. A method includes attaching a first side of an integrated circuit die to a carrier. An encapsulant is formed over and around the integrated circuit die. The encapsulant is patterned to form a first opening laterally spaced apart from the integrated circuit die and a second opening over the integrated circuit die. The first opening extends through the encapsulant. The second opening exposes a second side of the integrated circuit die. The first side of the integrated circuit die is opposite the second side of the integrated circuit die. A conductive material is simultaneously deposited in the first opening and the second opening.

A method for predicting the electrical functionality of a semiconductor package, the method includes performing a first stiffness test for a first semiconductor package, receiving failure data for the first semiconductor package, the failure data includes results of an electrical test performed after the first semiconductor package is assembled on a printed circuit board, generating a database comprising results of the first stiffness test as a function of the failure data for the first semiconductor package, performing a second stiffness test for a second semiconductor package, identifying a unique result from the results of the first stiffness test in the database, the unique result aligns with a result of the second stiffness test, and predicting a failure data for the second semiconductor package based on the failure data for the first semiconductor package which corresponds to the unique result of the first stiffness test identified in the database.

A chip testing method and apparatus, and an electronic equipment are provided. The method includes: determining, according to pad distribution information of a target chip, positions of set state pads and positions of non-set state pads in the target chip, the set state pads being pads with set states, and the set states including a first state or a second state; determining a plurality of pad state setting schemes according to the positions of the set state pads and the positions of the non-set state pads, the pad state setting schemes including setting each of the non-set state pads to the first state or the second state; and determining a test voltage setting scheme satisfying a preset condition according to information of differential voltage pad pairs in each of the pad state setting schemes, the differential voltage pad pair comprising two adjacent pads in different states.

An electronic device has a sealing part 90, a first main terminal 11 protruding outward from the sealing part 90, a second main terminal 12 protruding outwardly from the sealing part, an electronic element 95 provided in the sealing part and having a front surface electrically connected to the first main terminal 11 and a back surface electrically connected to the second main terminal 12, a head part 40 connected to the front surface of the electronic element 95, a sensing terminal 13 protruding to an outside from the sealing part 90 and used for sensing and a connection part 35 integrally formed with the head part 40 and electrically connected to the sensing terminal 13. A current flowing through the sensing terminal 13 and the connection part 35 among a sensing current path does not overlap a main current path flowing through the second main terminal 12, the electronic element 95 and the first main terminal 11.

The present disclosure describes a service module for a System in a Package (SiP) device. This includes methods of manufacture, use, and testing relating to the same.

A method is provided in the present disclosure. The method includes several operations: generating, by a processing unit, a mapping table associated with multiple scan chains and multiple shift cycles corresponding to multiple values stored in the scan chains in an integrated circuit; determining, based on the mapping table, at least one fail flip flop in the scan chains in response to the values outputted from the scan chains; and identifying at least one fault site corresponding to the at least one fail flip flop.

A system-in-package includes a function circuit and a protection circuit that protects the function circuit by preventing an instantaneous transient voltage from being applied to the function circuit. Here, the protection circuit includes a TVS diode and a capacitor. The TVS diode includes an anode that receives a ground voltage and a cathode that is connected to a first external connection terminal. The capacitor includes a first terminal that is connected to a second external connection terminal electrically separated from the first external connection terminal and a second terminal that receives the ground voltage.

A testing apparatus for testing an integrated circuit package having a plurality of electrical terminals includes a base, a socket, a plurality of conductive pins and a plurality of conductive pillars. The base includes a plurality of electrical contacts. The socket is disposed on the base and includes a bended portion bended away from the base and a plurality of through holes distributed in the socket. The conductive pins are disposed in the through holes respectively and electrically connected to the electrical contacts, wherein each of the conductive pins protrudes from an upper surface of the socket for forming temporary electrical connections with one of the electrical terminals. The conductive pillars are disposed on the base and connected to the bended portion, wherein each of the conductive pillars electrically connects one of the conductive pins and one of the electrical contacts.

The present invention relates to a test socket configured to electrically connect a tester generating a test signal and a device under inspection to each other includes a nonelastic electrically-conductive housing having a plurality of housing holes passing therethrough in a thickness direction, an insulating coating layer applied on at least an upper surface of the nonelastic electrically-conductive housing and a circumference of each of the plurality of housing hole, and an electrically-conductive part formed to have a configuration in which a plurality of electrically-conductive particles are contained in an elastic insulating material, disposed in the housing hole such that a lower end portion thereof may be connected to a signal electrode of the tester placed below the nonelastic electrically-conductive housing.