Programmable integrated circuits may be used to perform hardware emulation of an application-specific integrated circuit (ASIC) design. The ASIC design may be loaded onto the programmable integrated circuit. During hardware emulation operations, an emulation host may be used to coordinate testing of the DUT on the programmable device. Circuit design tools may be used to extract parasitics from the ASIC design, compute low-level interconnect delays, convert the interconnect delays to higher-level port-to-port delays, convert the port-to-port delays to timing constraints, and generate corresponding configuration data for programming the programmable integrated circuit to emulate the ASIC design. The programmable integrated circuit may then be tested for functional and performance integrity.

A method of delidding an integrated circuit (IC) package includes directing a laser beam along a cut line of an integrated circuit package. The cut line defines a removable portion, the cutting occurs along the cut line, and the removable portion is removed after the directing. A method of troubleshooting an integrated circuit package is also disclosed.

A wafer surface test preprocessing device includes a chamber; a supporting component disposed in the chamber; an atomizer connected to a lateral side of the chamber; a cooling component connected to a bottom of the chamber; and a lid disposed on a top of the chamber. With the wafer surface test preprocessing device having the cooling component to thereby dispense with a ventilation device and collect hydrofluoric acid residues in the chamber at the bottom of the chamber, thereby saving costs and time effectively.

A method for acquiring a signal from an encapsulated test point on a device under test, includes forming a hole in an encapsulant adjacent to the test point, the hole extending through the encapsulant to the test point, delivering a UV-curable conductive adhesive into the hole such that the delivered adhesive contacts the test point, applying UV light from a UV light source to cure the delivered adhesive, and connecting a conductive element between the cured adhesive and a test and measurement instrument.

An assembly for monitoring a semiconductor device under test comprising a mill configured to mill the device, a sensor configured to measure an electrical characteristic of the device, and a computer configured to determine the amount of strain in the device from the electrical characteristic when the mill is milling the device and detect an endpoint of milling at a circuit within the device. In use the endpoints of the milling process of the semiconductor device are detected measuring an electrical characteristic of the device with a sensor during milling determining the amount of strain in the device from the electrical characteristic and detecting an endpoint of the milling process within the device based on the amount of strain.

A cleaning method in an inspection apparatus that performs an electrical characteristic inspection on a device under test formed in an inspection object, includes: transferring, in a transfer process, a stage on which the inspection object is mounted to a position facing a probe card having probes, the probes being brought into contact with the device under test during the electrical characteristic inspection; subsequently, exhausting and depressurizing a space between the probe card and the stage facing the probe card in a peeling-off preparation process; introducing a gas into the space which has been depressurized and peeling off foreign substances adhering to a front surface of the stage and the probes in a foreign substance peeling-off process; and exhausting the space to discharge the foreign substances while continuously introducing the gas into the space in a foreign substance discharging process.

Methods and apparatus of forming a thermal interface with condensate are described. In an example, a device may be disposed in a test environment or a test apparatus. An amount of condensate may be accumulated on a heat sink to coat the heat sink with a layer of condensate. The coated heat sink may be disposed on the device, where the layer of condensate is directed towards the device, and the disposal of the coated heat sink causes the layer of condensate to spread among voids between the heat sink and the device to form a thermal interface that includes the condensate. A test may be executed on the device with the thermal interface comprising the condensate between the coated heat sink and the device.

A probe head that contains a coining surface and a plurality of probe tips integrated on a same side of the probe head is provided. The probe head has a first portion and a laterally adjacent second portion, wherein the first portion of the probe head contains the coining surface, and the second portion of the probe head contains the plurality of the probe tips. Each probe tip may, in some embodiments, extend outwards from a probe pedestal that is in contact with the second portion of the probe head. The probe head is traversed across the surface of a semiconductor wafer containing a plurality of solder bump arrays such that the coining surface contacts a specific array of solder bumps prior to contacting of the same specific array of solder bumps with the probe tips.

A wafer surface test preprocessing device includes a chamber; a supporting component disposed in the chamber; an atomizer connected to a lateral side of the chamber; a cooling component connected to a bottom of the chamber; and a lid disposed on a top of the chamber. With the wafer surface test preprocessing device having the cooling component to thereby dispense with a ventilation device and collect hydrofluoric acid residues in the chamber at the bottom of the chamber, thereby saving costs and time effectively.

A method of preparing a computer processor die includes determining a warpage shape of the computer processor die at a testing temperature. The method also includes selectively contouring a thickness of the computer processor die at a contouring temperature by physically removing material from a surface of the computer processor die such that the surface will be substantially flat at the testing temperature.