A power supply is configured to perform an at least partial compensation of a voltage variation caused by a load change using a voltage variation compensation mechanism which is triggered in response to an expected load change. An Automated test equipment for testing a device under test comprises a power supply, which is configured to supply the device under test. The automated test equipment comprises a pattern generator configured to provide one or more stimulus signals for the device under test. The power supply is configured to perform an at least partial compensation of a voltage variation caused by a load change using a voltage variation compensation mechanism which is activated in synchronism with one or more of the stimulus signals and/or in response to one or more response data signals from the device under test. Corresponding methods and a computer program are also described.

An abnormality detection method according to one aspect of the present disclosure is a method of detecting an abnormality in an AC signal to be input from an AC power supply. The method includes, where an ideal AC signal is represented as V.sub.0 sin ωt (V.sub.0: amplitude, co: angular frequency, t: time), calculating an arithmetic value including a value represented by sin.sup.2ωt+cos.sup.2ωt and determining that the AC signal is abnormal when the arithmetic value is out of a threshold range.

A circuit device is provided with a first codec including a first portion of a logic circuit and a second codec including a second portion of the logic circuit. The circuit device can also include a plurality of first scan chains coupled to the first codec and configured to shift a delayed test vector onto the first codec, wherein the delayed test vector is a test vector with a phase delay. A plurality of second scan chains can be coupled to the second codec and configured to shift the test vector onto the second codec.

A detector circuit included in a computer system filters the voltage level of a power supply node to generate filtered signals. The detector circuit either compares the filtered signals or samples the filtered signal and compares the samples to reference levels to detect changes in the voltage level of the power supply node that exceed thresholds for magnitude and duration. A control circuit included in the computer system generates, using the glitch signal, control signals that can be used to change operating parameters of functional circuits included in the computer system.

A method for real-time firmware configuration and a debugging apparatus are provided. When a demand for updating or debugging a target processor raises, in the method, a computer system generates a firmware debugging request that is attached with a firmware data with a specific debugging function. The computer system then loads the firmware data to a programmable logic unit of the debugging apparatus. After the real-time firmware configuration is completed, the computer system issues a debugging command to the programmable logic unit. The programmable logic unit obtains at least one debugging action after resolving the debugging command. The at least one debugging action is performed in the target processor when the target processor receives the at least one debugging action. A debugging result is returned after the at least one debugging action is completed.

Circuits, methods, and systems are provided which facilitate testing of asynchronous circuits having one or more global or local feedback loops. A circuit includes a data path and a scan path. The data path has an input configured to receive a data input signal, and a first output. The scan path includes a first multiplexer having a first input configured to receive the data input signal, a latch coupled to an output of the first multiplexer, a scan isolator coupled to an output of the latch, and a second multiplexer having a first input coupled to the first output of the data path and a second input coupled to an output of the scan isolator. The second multiplexer is configured to output a data output signal.

A load testing device includes a connection unit to which a power source being tested is connected, a hydrogen generating unit that performs electrolysis based on power supplied from the power source being tested to generate hydrogen, two or more supply units to which hydrogen obtained in the hydrogen generating unit passes and to which a portable tank is removably attached, and an operational unit that has a load amount adjustment switch and a display unit. The load amount of the hydrogen generating unit is switched depending on an operational state of the load amount adjustment switch. The display unit displays at least one of an attachment status of the portable tank and a filling status of hydrogen in the two or more supply units.

A voltage source device, including a first voltage source configured to output a first voltage, source pathways to connect the first voltage source to a device under test, sensing pathways electrically coupled to the device under test; and circuitry configured to sample a second voltage at the device under test, determine a voltage difference between the first voltage and the second voltage, and adjust the first voltage based on the difference between the first voltage and the second voltage.

A method for real-time firmware configuration and a debugging apparatus are provided. When a demand for updating or debugging a target processor raises, in the method, a computer system generates a firmware debugging request that is attached with a firmware data with a specific debugging function. The computer system then loads the firmware data to a programmable logic unit of the debugging apparatus. After the real-time firmware configuration is completed, the computer system issues a debugging command to the programmable logic unit. The programmable logic unit obtains at least one debugging action after resolving the debugging command. The at least one debugging action is performed in the target processor when the target processor receives the at least one debugging action. A debugging result is returned after the at least one debugging action is completed.

A circuit screening system including a target circuit under test receiving a first testing signal in a first period and a second testing signal in a second period; a power circuit providing a supply voltage to the target circuit under test, the supply voltage maintaining at a first voltage level in the first period and deviating from the first voltage level, and maintaining at the first voltage level in the second period; and a clock generating circuit providing a clock signal to the target circuit under test, the clock signal triggering the target circuit under test to receive the first testing signal in the first period and the second testing signal in the second period; the clock signal having a first profile and a second profile in the first period and the second period, respectively, and the first profile and the second profile having a phase difference.