An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.

An optical coupler device includes, on a substrate, a first light-receiving element coupled to a first light-emitting element and a second light-receiving element coupled to a second light-emitting element. First, second, and third terminals are disposed on the first substrate. A first transistor pair and a second transistor pair are disposed on the first substrate. The first transistor pair is configured to electrically connect and disconnect the first and second terminals in response to a first light signal received by the first light-receiving element. The second transistor pair is configured to electrically connect and disconnect the second and third terminals in response to a second light signal received by the second light-receiving element.

Methods and systems for automated diagnostics include registering an image of a device under test (DUT) to a corresponding design layout. The image is segmented based on the registration to allocate pixels to individual design elements. Emission signatures for the individual design elements are compared to expected signatures. If the emissions differ from the expected signatures more than a threshold amount to determine if a defect is present.

A jumper has a connector and a housing. The housing at least partially encloses a processor in data communication with a non-transitory memory, a global positioning system, a rechargeable battery, and a networking device. The memory comprises software instructions that, when executed by the processor, perform steps for wirelessly transmitting data to a mobile device over a network. The data indicates a jumper identification number, a location of the jumper, and a duration after which the jumper will automatically deactivate. The steps performed include the step of wirelessly outputting an alert to the mobile device when the mobile device is at a first distance from the jumper. The first distance is settable using the mobile device. The alert causes the mobile device to at least one of vibrate and ring.

Various apparatus and methods associated with a compact electronics test system having user programmable device interfaces and on-board functions adapted for use in various environments are provided. Exemplary embodiments can include a variety of apparatuses and methods to realize an advanced field programmable gate array adapted to perform functional tests on digital electronics within an exemplary 48-pin DIP footprint. One aspect of the invention can include a testing device comprised of components to produce a product that is inexpensive and consumable. A small size of an exemplary embodiment of the invention further allows for desirable shielding to be placed around a highly portable and highly programmable and adaptable testing device in order to protect it from external dangers found in harsh environments (e.g., high levels of radiation when operating in space, etc.).

A method for testing an integrated circuit (IC) using a nanoprobe, by using a scanning electron microscope (SEM) to register the nanoprobe to an identified feature on the IC; navigating the nanoprobe to a region of interest; scanning the nanoprobe over the surface of the IC while reading data from the nanoprobe; when the data from the nanoprobe indicates that the nanoprobe traverse a feature of interest, decelerating the scanning speed of the nanoprobe and performing testing of the IC. The scanning can be done at a prescribed nanoprobe tip force, and during the step of decelerating the scanning speed, the method further includes increasing the nanoprobe tip force.

Various apparatus and method s associated with a compact electronics test system having user programmable device interfaces and on-board functions adapted for use in various environments are provided. Exemplary embodiments can include a variety of apparatuses and method s to realize an advanced field programmable gate array adapted to perform functional tests on digital electronics within an exemplary 48-pin DIP footprint. One aspect of the invention can include a testing device comprised of components to produce a product that is inexpensive and consumable. A small size of an exemplary embodiment of the invention further allows for desirable shielding to be placed around a highly portable and highly programmable and adaptable testing device in order to protect it from external dangers found in harsh environments (e.g., high levels of radiation when operating in space, etc).

In some embodiments, an apparatus includes an automatic integrated circuit (IC) handler having a change kit. The change kit has a plunger moveably disposable onto an automatic test equipment (ATE). In such embodiments, the ATE is configured to receive an integrated circuit having an optical interface. The plunger has a first position and a second position. In such embodiments, the plunger is out of contact with the integrated circuit when the plunger is in the first position. The plunger includes an optical connector operatively coupled to the optical interface of the integrated circuit when the plunger is in the second position.

A method of testing a photonic device includes providing a plurality of optical test signals at respective inputs of a first plurality of inputs of an optical input circuit located on a substrate, combining the plurality of optical test signals into a combined optical test signal at an output of the optical input circuit, transmitting the combined optical test signal through the output to an input waveguide of an optical device under test, the optical device under test being located on the substrate, and measuring a response of the optical device under test to the combined optical test signal. Each of the plurality of optical test signals comprises a respective dominant wavelength of a plurality of dominant wavelengths.

Embodiments herein described an optical system for testing the bandwidth of a photodiode (PD) in a photonic integrated circuit (PIC). In one embodiment, a first optical signal is provided to bias one or more PDs in the PIC which generate a DC bias (e.g., DC voltage) across the PD whose bandwidth is being tested. A second optical signal is directed to the PD being tested, thereby generating an AC signal. The second optical signal can be a tunable optical signal where its frequency/wavelength is varied to test the bandwidth of the PD. The AC signal generated by the PD being tested is passed through a heating element (e.g., a resistor) which generates heat. This heat is then measured by an interferometer. The output of the interferometer can be correlated to a bandwidth of the PD.