An optical receiver including an ASIC, a light detector element, and a protective mask is disclosed. The light detector element is disposed on the ASIC and has a top surface oriented toward incident light, the top surface including a portion configured to receive the incident light and via which the incident light reaches an active area of the light detector element. The protective mask is placed over the ASIC so as to (i) cover, from the incident light, a portion of the ASIC, and (ii) provide an aperture that defines an optical path for the incident light through the protective mask to the portion of the top surface of the light detector element.

One example system comprises a substrate and a waveguide disposed on the substrate to define an optical path on the substrate. The waveguide is configured to guide, inside the waveguide and along the optical path, a light signal toward an edge of the waveguide. The edge defines an optical interface between the waveguide and a fluidic optical medium adjacent to the edge of the waveguide. The system also includes an optical fluid and a fluid actuator configured to adjust a physical state of the optical fluid based on a control signal. The adjustment of the physical state of the optical fluid causes an adjustment of the fluidic optical medium adjacent to the edge.

A semiconductor device includes a substrate. The semiconductor device further includes a waveguide on a first side of the substrate. The semiconductor device further includes a photodetector (PD) on a second side of the substrate, opposite the first side of the substrate. The semiconductor device further includes an optical through via (OTV) optically connecting the PD with the waveguide, wherein the OTV extends through the substrate from the first side of the substrate to the second side of the substrate.

An optical interconnect structure including a base substrate, an optical waveguide, a first reflector, a second reflector, a dielectric layer, a first lens, and a second lens is provided. The optical waveguide is embedded in the base substrate. The optical waveguide includes a first end portion and a second end portion opposite to the first end portion. The first reflector is disposed between the base substrate and the first end portion of the optical waveguide. The second reflector is disposed between the base substrate and the second end portion of the optical waveguide. The dielectric layer covers the base substrate and the optical waveguide. The first lens is disposed on the dielectric layer and located above the first end portion of the optical waveguide. The second lens is disposed on the dielectric layer and located above the second end portion of the optical waveguide.

In integrated optical structures (e.g., silicon-to-silicon-nitride mode converters) implemented in semiconductor-on-insulator substrates, wire waveguides whose sidewalls substantially consist of portions coinciding with crystallographic planes and do not extend laterally beyond the top surface of the wire waveguide may provide benefits in performance and/or manufacturing needs. Such wire waveguides may be manufactured, e.g., using a dry-etch of the semiconductor device layer down to the insulator layer to form a wire waveguide with exposed sidewalls, followed by a smoothing crystallographic wet etch.

In package intra-chip and/or inter-chip optical communications are provided using microLEDs and photodetectors mounted to integrated circuit (IC) chips and/or to transceiver dies associated with the IC chips. Light from the LEDs may pass through waveguides on or in a substrate to which the IC chips are mounted or which couple the IC chips.

An integrated optical device fabricated in the back end of line process located within the vertical span of the metal stack and having one or more advantages over a corresponding integrated optical device fabricated in the silicon on insulator layer.

A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves, where the second level is disposed above the first level, where the integrated circuits include single crystal transistors; and an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.

A photonic integrated circuit (PIC) having a substrate in which vertically coupled photodetectors and in-line optical modulators are integrated to enable vertical coupling of light using a fiber assembly block (FAB), with the planar end surface thereof being attached to a substantially planar main surface of the substrate. In an example embodiment, the photodetectors are buried in deep vias formed in the substrate, and the in-line optical modulators are waveguide-connected to the corresponding vertical-coupling optical gratings. The photodetectors and optical gratings may be arranged in a linear array along the main surface of the substrate to enable uncomplicated optical alignment of end segments of the optical fibers in the FAB with the corresponding photodetectors and optical gratings for vertical coupling of light therebetween. In some embodiments, the FAB may have more than one hundred optical fibers. In some embodiments, the PIC can be implemented using the silicon photonics material platform.

A semiconductor laser has a mirror formed in a gain chip. The mirror can be placed in the gain chip to provide a broadband reflector to support multiple lasers using the gain chip. The mirror can also be placed in the gain chip to have the semiconductor laser be more efficient or more powerful by changing an optical path length of the gain of the semiconductor laser.