Patent classifications
G02B6/13
Wavelength division multiplexing filters including a subwavelength grating
Structures for a wavelength division multiplexing filter and methods of fabricating a structure for a wavelength division multiplexing filter. The structure includes a first waveguide core having a first section and a second section. The first section and the second section have a first notched sidewall and a second notched sidewall opposite to the first notched sidewall. The structure further includes a second waveguide core positioned with a first offset in a first direction relative to the first section and the second section of the first waveguide core and with a second offset in a second direction relative to the first section and the second section of the first waveguide core. The second direction is transverse to the first direction.
DOUBLE BONDING WHEN FRABRICATING AN OPTICAL DEVICE
Embodiments herein describe using a double wafer bonding process to form a photonic device. In one embodiment, during the bonding process, an optical element (e.g., a high precision optical element) is optically coupled to an optical device in an active surface layer. In one example, the optical element comprises a nitride layer which can be patterned to form a nitride waveguide, passive optical multiplexer or demultiplexer, or an optical coupler.
Method for fabricating a heterostructure comprising active or passive elementary structure made of III-V material on the surface of a silicon-based substrate
A process for fabricating a heterostructure includes at least one elementary structure made of III-V material on the surface of a silicon-based substrate successively comprising: producing a first pattern having at least a first opening in a dielectric material on the surface of a first silicon-based substrate; a first operation for epitaxy of at least one III-V material so as to define at least one elementary base layer made of III-V material in the at least first opening; producing a second pattern in a dielectric material so as to define at least a second opening having an overlap with the elementary base layer; a second operation for epitaxy of at least one III-V material on the surface of at least the elementary base layer made of III-V material(s) so as to produce the at least elementary structure made of III-V material(s) having an outer face; an operation for transferring and assembling the at least photonic active elementary structure via its outer face, on an interface that may comprise passive elements and/or active elements, the interface being produced on the surface of a second silicon-based substrate; removing the first silicon-based substrate and the at least elementary base layer located on the elementary structure.
Photonics optoelectrical system
There is set forth herein a method including building a first photonics structure using a first wafer having a first substrate, wherein the building the first photonics structure includes integrally fabricating within a first photonics dielectric stack one or more photonics device, the one or more photonics device formed on the first substrate; building a second photonics structure using a second wafer having a second substrate, wherein the building the second photonics structure includes integrally fabricating within a second photonics dielectric stack a laser stack structure active region and one or more photonics device, the second photonics dielectric stack formed on the second substrate; and bonding the first photonics structure and the second photonics structure to define an optoelectrical system having the first photonics structure bonded the second photonics structure.
Photonics optoelectrical system
There is set forth herein a method including building a first photonics structure using a first wafer having a first substrate, wherein the building the first photonics structure includes integrally fabricating within a first photonics dielectric stack one or more photonics device, the one or more photonics device formed on the first substrate; building a second photonics structure using a second wafer having a second substrate, wherein the building the second photonics structure includes integrally fabricating within a second photonics dielectric stack a laser stack structure active region and one or more photonics device, the second photonics dielectric stack formed on the second substrate; and bonding the first photonics structure and the second photonics structure to define an optoelectrical system having the first photonics structure bonded the second photonics structure.
High-density optical waveguide structure and printed circuit board and preparation method thereof
The disclosure relates to a high-density optical waveguide structure, a printed circuit board and a preparation method thereof. The high-density optical waveguide structure comprises an undercladding layer, a core layer and an upper cladding layer in sequence; wherein, the lower cladding layer is arranged at intervals. The trench is filled with an optical waveguide material to form a core layer. The waveguide structure integrates an optical waveguide into a PCB to realize photoelectric interconnection. The waveguide structure can better achieve higher parallel interconnection density, maintain good signal integrity, reduce device and device size, and at the same time, consume less power. The structure is configured to easily dissipate heat, enabling a simpler physical architecture and design, maximizing the wiring space of printed circuit boards, facilitating the fabrication of ultra-fine wire boards; and improving the wiring density and reliability of existing manufacturing methods.
High-density optical waveguide structure and printed circuit board and preparation method thereof
The disclosure relates to a high-density optical waveguide structure, a printed circuit board and a preparation method thereof. The high-density optical waveguide structure comprises an undercladding layer, a core layer and an upper cladding layer in sequence; wherein, the lower cladding layer is arranged at intervals. The trench is filled with an optical waveguide material to form a core layer. The waveguide structure integrates an optical waveguide into a PCB to realize photoelectric interconnection. The waveguide structure can better achieve higher parallel interconnection density, maintain good signal integrity, reduce device and device size, and at the same time, consume less power. The structure is configured to easily dissipate heat, enabling a simpler physical architecture and design, maximizing the wiring space of printed circuit boards, facilitating the fabrication of ultra-fine wire boards; and improving the wiring density and reliability of existing manufacturing methods.
Monolithic integrated quantum dot photonic integrated circuits
A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.
Monolithic integrated quantum dot photonic integrated circuits
A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.
Systems and methods for wafer-level photonic testing
A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.