An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.

A frame member for an electron beam lithography device of the present disclosure includes a frame body comprising sapphire or aluminum oxide-based ceramics having an open porosity of 0.2% or less and a conductive film disposed at least on a main surface of an electron gun side of the frame body.

A system generates a mask for a circuit design while enforcing symmetry and consistency across random areas of the mask. The system builds a mask solutions database mapping circuit patterns to mask patterns. The system uses the mask solutions database to replace circuit patterns of the circuit design with mask patterns. The system identifies properties in circuit patterns of the circuit design and enforces the same property in the corresponding mask patterns. Examples of properties enforced include symmetry within circuit patterns and similarity across circuit patterns. The system combines mask patterns in different regions of the circuit and resolves conflicts that occur when there are multiple masks within a region.

A method of forming a composite material includes photo-initiating a polymerization of a monomer in a pattern of interconnected units to form a polymer microlattice. Unpolymerized monomer is removed from the polymer microlattice. The polymer microlattice is coated with a metal. The metal-coated polymer microlattice is dispersed in a polymer matrix.

A method of forming a composite material includes photo-initiating a polymerization of a monomer in a pattern of interconnected units to form a polymer microlattice. Unpolymerized monomer is removed from the polymer microlattice. The polymer microlattice is coated with a metal. The metal-coated polymer microlattice is dispersed in a polymer matrix.

Embodiments disclosed herein include methods of patterning a back end of line (BEOL) stack and the resulting structures. In an embodiment a method of patterning a BEOL stack comprises forming a grating over an interlayer dielectric (ILD), and forming a spacer over the grating. In an embodiment, the spacer is etch selective to the grating. In an embodiment, the method further comprises disposing a hardmask over the grating and the spacer, and patterning the hardmask to form an opening in the hardmask. In an embodiment, the method further comprises filling the opening with a plug, removing the hardmask, and etching the spacer. In an embodiment, a portion of the spacer is protected from the etch by the plug. In an embodiment, the method may further comprise removing the plug, and transferring the grating into the ILD with an etching process.

Embodiments disclosed herein include methods of patterning a back end of line (BEOL) stack and the resulting structures. In an embodiment a method of patterning a BEOL stack comprises forming a grating over an interlayer dielectric (ILD), and forming a spacer over the grating. In an embodiment, the spacer is etch selective to the grating. In an embodiment, the method further comprises disposing a hardmask over the grating and the spacer, and patterning the hardmask to form an opening in the hardmask. In an embodiment, the method further comprises filling the opening with a plug, removing the hardmask, and etching the spacer. In an embodiment, a portion of the spacer is protected from the etch by the plug. In an embodiment, the method may further comprise removing the plug, and transferring the grating into the ILD with an etching process.

An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.

The present invention relates to a resist composition, especially for use in the production of electronic components via electron beam lithography. In addition to the usual base polymeric component (resist polymer), a secondary electron generator is included in resist compositions of the invention in order to promote secondary electron generation. This unique combination of components increases the exposure sensitivity of resists in a controlled fashion which facilitates the effective production of high-resolution patterned substrates (and consequential electronic components), but at much higher write speeds.

The present invention relates to a resist composition, especially for use in the production of electronic components via electron beam lithography. In addition to the usual base polymeric component (resist polymer), a secondary electron generator is included in resist compositions of the invention in order to promote secondary electron generation. This unique combination of components increases the exposure sensitivity of resists in a controlled fashion which facilitates the effective production of high-resolution patterned substrates (and consequential electronic components), but at much higher write speeds.