A method includes providing a photomask having a patterned absorption layer over a substrate. The photomask is irradiated with a beam having a mixture of transverse electronic (TE) waves and transverse magnetic (TM) waves. The irradiating includes generating surface plasmonic polaritons (SPP) on a sidewall of the patterned absorption layer. The SPP is used to suppress the TM waves while reflecting the TE waves. A target substrate is exposed to TE waves.

A method for configuring a semiconductor manufacturing process, the method including: providing an initial prediction model including a plurality of model parameters to one or more remote locations; receiving at least one updated model parameter from the one or more remote locations, the at least one model parameter is updated by training the initial prediction model with local data at the one or more remote locations; determining aggregated model parameters based on the at least one updated model parameter received from the one or more remote locations; and adjusting the initial prediction model based on the aggregated model parameters, the adjusted prediction model being operable to configure the semiconductor manufacturing process.

A mask layout is received. An interaction-free mask model is applied to the mask layout. An edge interaction model is applied to the mask layout. The edge interaction model describes an influence due to a plurality of combinations of two or more edges interacting with one another. A thin mask model is applied to the mask layout. A near field is determined based on the applying of the interaction-free mask model, the applying of the edge interaction model, and the applying of the thin mask model.

A phase-shift reticle for a photolithography process in semiconductor fabrication is provided. The reticle includes a substrate, a reflective structure, a pattern defining layer and a phase shifter. The reflective structure is disposed over the substrate. The pattern defining layer includes a first material and is deposited over the reflective structure. The pattern defining layer comprises a pattern trench. The phase shifter includes a second material and disposed in the pattern trench. A transmittance of the second material is different from a transmittance of the first material.

A phase shift mask suitable for forming a via pattern on a transferred object is provided. The phase shift mask has a first pattern region and a second pattern region. The phase shift mask includes a substrate and a phase shift pattern layer. The phase shift pattern layer is located on the substrate and is disposed corresponding to one of the first pattern region and the second pattern region. An optical phase difference corresponding to the first pattern region and the second pattern region is basically 180 degrees. The first pattern region has a via region away from the second pattern region. The second pattern region includes a plurality of strip patterns surrounding the via region.

A method for assigning features into at least first features and second features, the first features being for at least one first patterning device configured for use in a lithographic process to form corresponding first structures on a substrate and the second features being for at least one second patterning device configured for use in a lithographic process to form corresponding second structures on a substrate, wherein the method including assigning the features into the first features and the second features based on a patterning characteristic of the features.

The present disclosure discloses a lithography process method for defining sidewall morphology of a lithography pattern, comprising: Step 1: designing a mask, wherein a mask pattern is formed on the mask, the mask pattern being used to define a lithography pattern; the lithography pattern has a sidewall, and a mask side face pattern structure that defines sidewall morphology of the lithography pattern is provided on the mask pattern, the mask side face pattern structure having a structure that enables an exposure light intensity to gradually change; Step 2: coating a to-be-exposed substrate with a photoresist; Step 3: exposing the photoresist by using the mask, and then performing development to form the lithography pattern; and Step 4: performing post-baking. The present disclosure can define the sidewall morphology of a lithography pattern, facilitating formation of a lithography pattern sidewall with an inclined side face.

Disclosed are a photomask, an exposure apparatus, and a method of fabricating a three-dimensional semiconductor memory device using the same. The photomask may include a mask substrate, a first mask pattern on the mask substrate, and an optical path modulation substrate. The optical path modulation substrate may include a first region on a portion of the first mask pattern, and a second region on another portion of the first mask pattern. The second region has a thickness that is less than a thickness of the first region.

Disclosed is a method of measuring focus performance of a lithographic apparatus, and corresponding patterning device and lithographic apparatus. The method comprises using the lithographic apparatus to print one or more first printed structures and second printed structures. The first printed structures are printed by illumination having a first non-telecentricity and the second printed structures being printed by illumination having a second non-telecentricity, different to said first non-telecentricity. A focus dependent parameter related to a focus-dependent positional shift between the first printed structures and the second printed structures on said substrate is measured and a measurement of focus performance based at least in part on the focus dependent parameter is derived therefrom.

Certain aspects relate to a method for improving a lithography configuration. In the lithography configuration, a source illuminates a mask to expose resist on a wafer. A processor determines a defect-based focus exposure window (FEW). The defect-based FEW is an area of depth of focus and exposure latitude for the lithography configuration with an acceptable level of defects on the wafer. The defect-based FEW is determined based on a predicted probability distribution for occurrence of defects on the wafer. A processor also determines a critical dimension (CD)-based FEW. The CD-based FEW is an area of depth of focus and exposure latitude for the lithography configuration with an acceptable level of CD variation on the wafer. It is determined based on predicted CDs on the wafer. The lithography configuration is modified based on increasing an area of overlap between the defect-based FEW and the CD-based FEW.