A method of processing a wafer is provided. The method includes providing a reference plate below the wafer. The reference plate includes a reference pattern. The reference plate is imaged to capture an image of the reference pattern by directing light through the wafer. A first pattern is aligned using the image of the reference pattern. The first pattern is applied to a working surface of the wafer based on the aligning.

Systems and methods for determining one or more characteristic metrics for a portion of a pattern on a substrate are described. Pattern information for the pattern on the substrate is received. The pattern on the substrate has first and second portions. The first portion of the pattern is blocked, for example with a geometrical block mask, based on the pattern information, such that the second portion of the pattern remains unblocked. The one or more metrics are determined for the unblocked second portion of the pattern. In some embodiments, the first and second portions of the pattern correspond to different exposures in a semiconductor lithography process. The semiconductor lithography process may be a multiple patterning technology process, for example, such as a double patterning process, a triple patterning process, or a spacer double patterning process.

According to an exemplary embodiment of the invention, a method of patterning a photoresist is provided. The method includes selectively illuminating an edge portion of a photoresist using an illumination system to form a patterned portion of the photoresist.

A method of manufacturing a semiconductor device includes forming a first tone resist layer over an underlayer. The first tone resist layer is pattern to form a first pattern exposing a portion of the underlayer. The first pattern is extended into the underlayer, and the first tone resist layer is removed. A second tone resist layer is formed over the underlayer, wherein the second tone is opposite the first tone. The second tone resist layer is patterned to form a second pattern exposing another portion of the underlayer. The second pattern is extended into underlayer, and the second tone resist layer is removed.

A method is provided. The method includes forming a shrink material layer over a substrate including a photoresist pattern. The method also includes exposing the substrate with the shrink material layer to an activating radiation via a grey-tone mask that provides a predetermined light transmittance profile for the activating radiation. The method also includes removing at least a portion of the shrink material layer.

A method of forming a pattern of a semiconductor device includes: preparing a semiconductor substrate including a cell region and an outer region; applying a photoresist on the semiconductor substrate; irradiating extreme ultraviolet (EUV) light reflected from an EUV mask, onto the photoresist; forming a photoresist pattern in the cell region and the outer region; and etching the semiconductor substrate, using the photoresist pattern as an etch mask. The EUV mask includes: a plurality of main patterns in a first zone, of the EUV mask, corresponding to the cell region; and a first lane and a second lane in a second zone, of the EUV mask, corresponding to the outer region, wherein the first lane and the second lane surround the plurality of main patterns, wherein the first lane has a line-and-space pattern, and the second lane has a protruding pattern.

A method for forming ultra-high density integrated circuitry, such as for a 6T SRAM, for example, is provided. The method involves applying double patterning litho-etch litho-etch (LELE) and using a spacer process to shrink the critical dimension of features. To improve process margins, the method implements a double-patterning technique by modifying the layout and splitting cross-coupling straps into two colors (e.g., each color corresponds to a mask-etch process). In addition, a spacer process is implemented to shrink feature size and increase the metal-to-metal spacing between the two cross-coupling straps, in order to improve process margin and electrical performance. This is achieved by depositing a spacer layer over an opening in a hardmask, followed by spacer etch back. The opening is thus shrunk by the amount of spacer thickness. The strap-to-strap spacing may then be increased by twice the amount of spacer thickness.

An optical device is fabricated with a higher resolution of features in a patterned lattice. A photoresist is applied to a device layer for the optical device. Several photomasks offset from one another are used in different exposure steps to expose the photoresist with features. The features in each exposure can have different characteristic dimensions, such as different diameters for posts or holes to be produced in the device layer. Once the exposures are complete, the patterned lattice of the features are produced in the device layer. For example, the photoresist is developed, and reactive ion etching is used to produce the features in the device layer.

A method of pattern alignment is provided. The method includes identifying a reference pattern positioned below a working surface of a wafer. The wafer is exposed to a first pattern of actinic radiation. The first pattern is a first component of a composite pattern. The first pattern of actinic radiation is aligned using the reference pattern. The wafer is exposed to a second pattern of actinic radiation. The second pattern is a second component of the composite pattern and exposed adjacent to the first pattern. The second pattern of actinic radiation is aligned with the first pattern of actinic radiation using the reference pattern.

In a method of manufacturing a photo mask used in a semiconductor manufacturing process, a mask pattern layout in which a plurality of patterns are arranged is acquired. The plurality of patterns are converted into a graph having nodes and links. It is determined whether the nodes are colorable by N colors without causing adjacent nodes connected by a link to be colored by a same color, where N is an integer equal to or more than 3. When it is determined that the nodes are colorable by N colors, the nodes are colored with the N colors. The plurality of patterns are classified into N groups based on the N colored nodes. The N groups are assigned to N photo masks. N data sets for the N photo masks are output.