A method for producing a flexible printed wiring board using a photoresist includes placing the photoresist, including a first region and a second region, on a substrate, placing a first photomask including a first light-transmitting portion such that the first light-transmitting portion faces the first region to expose the photoresist through the first light-transmitting portion, and placing a second photomask including a second light-transmitting portion such that the second light-transmitting portion faces the second region to expose the photoresist through the second light-transmitting portion. The first region is adjacent to the second region such that an edge portion of the first region overlaps an edge portion of the second region. The first light-transmitting portion has a linear shape including a first tip having a tapered shape.

An illumination system of a microlithographic projection exposure apparatus includes a light source operated in a pulsed manner and a DMD (digital mirror device) or another array of optical elements, which are digitally switchable between two switching positions.

A method for exposing a wafer according to pattern data using a charged particle lithography machine generating a plurality of charged particle beamlets for exposing the wafer. The method comprises providing the pattern data in a vector format, rendering the vector pattern data to generate multi-level pattern data, dithering the multi-level pattern data to generate two-level pattern data, supplying the two-level pattern data to the charged particle lithography machine, and switching on and off the beamlets generated by the charged particle lithography machine on the basis of the two-level pattern data, wherein the pattern data is adjusted on the basis of corrective data.

A method of exposing a patterned area on a substrate using an EUV lithographic apparatus having a demagnification of about 5 and a numerical aperture of about 0.4 is disclosed. The method comprises exposing a first portion of the patterned area on the substrate using a first exposure, the first portion dimensions are significantly less than the dimensions of a conventional exposure, and exposing one or more additional portions of the patterned area on the substrate using one or more additional exposures, the additional portions having dimensions which are significantly less than the dimensions of a conventional exposure. The method further comprises repeating the above to expose a second patterned area on the substrate, the second patterned area being provided with the same pattern as the first patterned area, wherein a distance between center points of the first and second patterned areas corresponds with a dimension of a conventional exposure.

The present disclosure provides a method for exposure and development, a system for controlling exposure and a system for exposure and development. The method for exposure and development is configured to expose and develop a substrate when the substrate having a size larger than that of a mask. The method includes: exposing and developing a plurality of different regions of the substrate by means of the mask respectively, wherein the plurality of different regions are pieced to form an entire region which needs to be exposed and developed.

A method for manufacturing semiconductor devices include steps of depositing a first photoresist over a first dielectric layer, first exposing the first photoresist to a first light-exposure using a first lithographic mask, and second exposing the first photoresist to a second light-exposure using a second lithographic mask. An overlap region of the first photoresist is exposed to both the first light-exposure and the second light-exposure. The first dielectric layer is thereafter patterned to form a mask overlay alignment mark in the overlap region. The patterning includes etching the first dielectric layer form a trench, and filling the trench with a conductive material to produce the alignment mark. A second dielectric layer is deposited over the alignment mark, and a second photoresist is deposited over the second dielectric layer. A third lithographic mask is aligned to the second photoresist using the underlying mask overlay alignment mark for registration.

A mask correction method, a mask correction device for double patterning, and a training method for a layout machine learning model are provided. The mask correction method for double patterning includes the following steps. A target layout is obtained. The target layout is decomposed into two sub-layouts, which overlap at a stitch region. A size of the stitch region is analyzed by the layout machine learning model according to the target layout. The layout machine learning model is established according to a three-dimensional information after etching. An optical proximity correction (OPC) procedure is performed on the sub-layouts.

An exposure method includes forming a first exposure pattern in a first region in a pattern formation region on a substrate, forming a second exposure pattern in a second region spaced apart from the first region, the second region being in the pattern formation region, and forming an exposure pattern in a third region between the first region and the second region based on measurement results of a position of the first exposure pattern and a position of the second exposure pattern.

Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.

This invention provides an exposure apparatus for exposing each of a plurality of shot regions on a substrate. The exposure apparatus includes a control unit configured to control exposure processing of exposing each of the plurality of shot regions on the substrate using control information for controlling shapes of the shot regions exposed on the substrate such that the plurality of shot regions are adjacent to each other. The control information includes correction information for correcting, based on layout information of a plurality of shots adjacent to each other, a shift of adjacent portions of the plurality of shot regions caused by a distortion of the shapes of the plurality of shot regions. The control unit controls the exposure processing using the correction information.