A method of manufacturing a patterned substrate includes: providing an exposure mask that includes: a plurality of inner light-shielding portions arranged in a lattice, a light-transmissive portion integrally connecting regions surrounding the plurality of inner light-shielding portions, and an outer light-shielding portion surrounding the light-transmissive portion; performing a plurality of exposures of a photoresist layer disposed on a substrate in a step-and-repeat-manner using the exposure mask, so as to form a plurality of inner projected parts corresponding to the inner light-shielding portions, the inner projected parts being aligned in a lattice as a whole; developing the photoresist layer on which the plurality of exposures have been performed; and etching the substrate using the developed photoresist layer as a mask.

An extreme ultraviolet lithography system (10) that creates a pattern (230) having a plurality of densely packed parallel lines (232) on a workpiece (22) includes a patterning element (16); an EUV illumination system (12) that directs an extreme ultraviolet beam (13A) at the patterning element (16); a projection optical assembly (18) that directs the extreme ultraviolet beam diffracted off of the patterning element (16) at the workpiece (22); and a pattern blind assembly (26) positioned in a beam path (55) of the extreme ultraviolet beam (13A). The pattern blind assembly (26) shapes the extreme ultraviolet beam (13A) so that an exposure field (28) on the workpiece (22) has a polygonal shape.

In an exposure apparatus, on a substrate holder, a plurality of grating areas is arranged mutually apart in the X-axis direction, and a plurality of heads that irradiates a measurement beam with respect to the grating area and can move in the Y-axis direction is arranged outside of the substrate holder. A control system controls movement of the substrate holder in at least directions of three degrees of freedom within an XY plane, based on measurement information of at least three heads of the plurality of heads facing the grating area and measurement information of a measurement device that measures position information of the plurality of heads. The measurement beam of each of the plurality of heads, during the movement of substrate holder in the X-axis direction, moves off of one of the plurality of grating areas and switches to another adjacent grating area.

The invention concerns a method and a device for calibrating at least one scanning system (4, 5, 17) when producing an object (8) by additive manufacturing, wherein the coordinates of one or several reference positions are measured in the relative coordinate system of each scanning system (4, 5, 17), after which the calibration of each of the scanning systems is adapted starting from the measured coordinates of the reference positions.

A device and method for producing light-exposed structures on a workpiece having a light-sensitive surface. An optical unit includes a light source and a diffraction grating for producing a strip-shaped illumination pattern having strips extending in a longitudinal direction and having a pattern width extending transversely. A device moves the surface of the workpiece and optical unit relative to each other according to a path sequence, which includes movement longitudinal paths to produce a first and second light-exposed structure having strips, which is oriented parallel to each other on the workpiece surface. The movement paths are mutually spaced apart by less than the pattern width and the light-exposed structures overlap in such a way that strips of the light-exposed structures lie on each other. To obtain good light exposure of the surface by the illumination pattern, the diffraction grating is set oblique to the surface of the workpiece that is light-exposed by the illumination pattern.

In some embodiments, a method for forming an integrated circuit is provided. The method includes forming a first layer over a semiconductor wafer, the first layer having a first portion and a second portion. The first portion is patterned by projecting a first image field over the first portion of the first layer, where the first portion of the first layer corresponds to the first image field. The second portion is patterned by projecting a second image field over the second portion of the first layer, where the second portion of the first layer corresponds to the second image field. A second layer is formed over the first layer. The second layer is patterned by projecting a third image field over the second layer, where the third image field covers a majority of the first portion and a majority of the second portion of the first layer.

In some embodiments, a method for forming an integrated circuit is provided. The method includes forming a first layer over a semiconductor wafer, the first layer having a first portion and a second portion. The first portion is patterned by projecting a first image field over the first portion of the first layer, where the first portion of the first layer corresponds to the first image field. The second portion is patterned by projecting a second image field over the second portion of the first layer, where the second portion of the first layer corresponds to the second image field. A second layer is formed over the first layer. The second layer is patterned by projecting a third image field over the second layer, where the third image field covers a majority of the first portion and a majority of the second portion of the first layer.

A system and method for fabricating distinct types of circuit connections on a semiconductor wafer includes fabricating, using a first photomask, a plurality of a first type of circuit connections for each of a plurality of distinct die of a semiconductor wafer; and fabricating, using a second photomask, a plurality of a second type of circuit connections between a plurality of distinct pairs of components of the semiconductor wafer, wherein each distinct pair of components includes at least one distinct die of the plurality of distinct die and one of a conductive pad and a sacrificial die.

Embodiments of the present disclosure generally relate to an image projection system. The image projection system includes an active matrix solid state emitter (SSE) device. The active matrix solid state emitter includes a substrate, a silicon layer, and a emitter substrate. The silicon layer is deposited over the substrate having a plurality of transistors formed therein. The emitter substrate is positioned between the silicon layer and the substrate. The emitter substrate comprises a plurality of emitter arrays. Each emitter array defines a pixel, wherein one pixel comprises one or more transistors from the plurality of transistors. Each transistor is configured to receive a variable amount of current.

A semiconductor device includes first and second inspection mark regions having the same pattern including a plurality of overlay inspection marks, a first element region having a portion overlapping with the first inspection mark region, and a second element region having a portion overlapping with the second inspection mark region. The first and second element regions are adjacent to each other and have different areas. The first element region includes a first pattern aligned with a plurality of first overlay inspection marks. The second element region includes a second pattern aligned with a plurality of second overlay inspection marks.