Patent classifications
G03F9/708
Method for lithographically forming wafer identification marks and alignment marks
The present disclosure relates a method of forming substrate identification marks. In some embodiments, the method may be performed by forming a photosensitive material over a substrate. A first type of electromagnetic radiation is selectively provided to the photosensitive material to expose a plurality of substrate identification marks within the photosensitive material, and a second type of electromagnetic radiation is selectively provided to the photosensitive material to expose one or more alignment marks within the photosensitive material. Exposed portions of the photosensitive material are removed to form a patterned photosensitive material. The substrate is etched according to the patterned photosensitive material to form recesses within the substrate that are defined by the plurality of substrate identification marks and the one or more alignment marks.
Registration mark formation during sidewall image transfer process
Methods of forming a registration mark may include forming a plurality of mandrels over a hard mask over a semiconductor layer, each mandrel including a spacer adjacent thereto. At least one mandrel is selected and a mask is formed over the at least one selected mandrel. The plurality of mandrels are removed leaving the spacers, the mask preventing removal of the at least one selected mandrel. The mask is removed. A first etching patterns the sub-lithographic structures and the registration mark into the hard mask using the spacers as a pattern and the at least one selected mandrel and adjacent spacer for the registration mark. A second etching forms the sub-lithographic structures in the semiconductor layer using the patterned hard mask and to form the registration mark in the semiconductor layer using the at least one selected mandrel and the patterned hard mask.
Mark, method for forming same, and exposure apparatus
A mark forming method includes: forming recessed portion on a mark formation area of a substrate; coating the recessed portion with a polymer layer containing a block copolymer, allowing the polymer layer in the recessed portion to form a self-assembled area; selectively removing a portion of the self-assembled area; and forming a positioning mark by using the self-assembled area from which the portion thereof has been removed.
Alignment mark structure and method for making
The reflectance of a low-reflectance alignment mark is increased by coating the alignment mark with a high-reflectance film layer. This improves the strength of the light signal and reduces variation in the light signal.
Light emitting device and method for manufacturing light emitting device
A light emitting device (10) includes light emitting elements (12), conductor wirings (14), and alignment marks (18) formed on a substrate (11). The alignment marks (18) and the conductor wirings (14) are formed by printing.
Method for transferring a mark pattern to a substrate, a calibration method, and a lithographic apparatus
A method including: providing a reference substrate with a first mark pattern; providing the reference substrate with a first resist layer on the reference substrate, wherein the first resist layer has a minimal radiation dose needed for development of the first resist; using a reference patterning device to impart a radiation beam with a second mark pattern in its cross-section to form a patterned radiation beam; and exposing a target portion of the first resist layer of the reference substrate n times to said patterned radiation beam to create exposed areas in the target portion of the first resist layer in accordance with the second mark pattern that have been subjected to an accumulated radiation dose above the minimal radiation dose of the first resist layer, wherein n is an integer with a value of at least two.
Photolithography alignment mark structures and semiconductor structures
A method is provided for fabricating a photolithography alignment mark structure. The method includes providing a substrate; forming a first grating, a second grating, a third grating and a fourth grating in the substrate; forming a photoresist layer on a surface of the substrate; obtaining a first alignment center along a first direction and a second alignment center alone a second direction based on the first grating and the fourth grating, respectively; providing a mask plate having a fifth grating pattern and a sixth grating pattern; aligning the mask plate with the substrate by using the first alignment center as an alignment center along the first direction and the second alignment center as an alignment center along the second direction; reproducing the fifth grating pattern and the sixth grating pattern in the photoresist layer; and forming a fifth grating and a sixth grating on the substrate by removing a portion of photoresist layer.
LITHOGRAPHY ENGRAVING MACHINE FOR FORMING WAFER IDENTIFICATION MARKS AND ALIGNMENT MARKS
The present disclosure relates a method of forming substrate identification marks. In some embodiments, the method may be performed by forming a photosensitive material over a substrate. A first type of electromagnetic radiation is selectively provided to the photosensitive material to expose a plurality of substrate identification marks within the photosensitive material, and a second type of electromagnetic radiation is selectively provided to the photosensitive material to expose one or more alignment marks within the photosensitive material. Exposed portions of the photosensitive material are removed to form a patterned photosensitive material. The substrate is etched according to the patterned photosensitive material to form recesses within the substrate that are defined by the plurality of substrate identification marks and the one or more alignment marks.
Wafer-level etching methods for planar photonics circuits and devices
A photoresist material is deposited, patterned, and developed on a backside of a wafer to expose specific regions on the backside of chips for etching. These specific regions are etched to form etched regions through the backside of the chips to a specified depth within the chips. The specified depth may correspond to an etch stop material. Etching of the backside of the wafer can also be done along the chip kerf regions to reduce stress during singulation/dicing of individual chips from the wafer. Etching of the backside of the chips can be done with the chips still part of the intact wafer. Or, the wafer having the pattered and developed photoresist on its backside can be singulated/diced before etching through the backside of the individual chips. The etched region(s) formed through the backside of a chip can be used for attachment of optical component(s) to the chip.
Multi-layer semiconductor device structure
One embodiment of the instant disclosure provides a semiconductor structure that comprises: a first device layer including a first active layer disposed over a substrate and a first gate layer disposed on the active layer, where at least one of the first active layer and the first gate layer includes a first layer alignment structure; a first bounding layer disposed over the first device layer, the first bounding layer including an opening arranged to detectably expose the first layer alignment structure; and a second device layer disposed over the bounding layer including a second layer alignment structure, where the second layer alignment structure is substantially aligned to the first layer alignment structure through the opening.