A semiconductor device includes first and second inspection mark regions having the same pattern including a plurality of overlay inspection marks, a first element region having a portion overlapping with the first inspection mark region, and a second element region having a portion overlapping with the second inspection mark region. The first and second element regions are adjacent to each other and have different areas. The first element region includes a first pattern aligned with a plurality of first overlay inspection marks. The second element region includes a second pattern aligned with a plurality of second overlay inspection marks.

A photomask alignment method for a manufacturing process of an integrated circuit in a semiconductor material wafer (20), the method envisaging: at a first level, defining, by means of a single photolithography process, at least one alignment structure (10; 10) on the wafer (20), the alignment structure (10; 10) having at least a first (4a) and a second (4b) reference mark; and, at an upper level, higher than the first one, aligning a first field mask (11a) relative to the at least one first reference mark (4a); and aligning a second field mask (11b), which is used, together with the first field mask (11a), for the photolithography formation of the integrated circuit inside a respective die (22) in the wafer (20), relative to the at least one second reference mark (4b), so that the first and second field masks (11a, 11b) are arranged on the wafer (20) adjacent to one another in a first coupling direction, without any mutual overlapping.

Wafer alignment with restricted visual access has been disclosed. In an example, a method of processing a substrate for fabricating a solar cell involves supporting the substrate over a stage. The method involves forming a substantially opaque layer over the substrate. The substantially opaque layer at least partially covers edges of the substrate. The method involves performing fit-up of the substantially opaque layer to the substrate. The method involves illuminating the covered edges of the substrate with light transmitted through the stage, and capturing a first image of the covered edges of the substrate based on the light transmitted through the stage. The method further includes determining a first position of the substrate relative to the stage based on the first image of the covered edges. The substrate may be further processed based on the determined first position of the substrate under the substantially opaque layer.

A lithographic apparatus having a substrate table, a projection system, an encoder system, a measurement frame and a measurement system. The substrate table has a holding surface for holding a substrate. The projection system is for projecting an image on the substrate. The encoder system is for providing a signal representative of a position of the substrate table. The measurement system is for measuring a property of the lithographic apparatus. The holding surface is along a plane. The projection system is at a first side of the plane. The measurement frame is arranged to support at least part of the encoder system and at least part of the measurement system at a second side of the plane different from the first side.

A method for revealing sensor targets on a substrate covered with a layer, the method including: obtaining locations of first areas on the substrate with yielding target portions and of second areas on the substrate with non-yielding target portions; at least partially removing feature regions of the layer covering sensor targets in the second areas to reveal sensor targets in the second areas; measuring a location of the revealed sensor targets in the second areas; determining a location of sensor targets in the first areas based on the measured location of the revealed sensor targets in the second areas; and at least partially removing sensor target regions of the layer covering the sensor targets in the first areas using the determined location of the sensor targets in the first areas.

Embodiments of the disclosure provides an apparatus for aligning layers of an integrated circuit (IC), the apparatus including: an insulator layer positioned above a semiconductor substrate; a first diffraction grating within a first region of the insulator layer, the first diffraction grating including a first grating material within the first region of the insulator layer; and a second diffraction grating within a second region of the insulator layer, the second grating including a second grating material within the second region of the insulator layer, wherein the second grating material is different from the first grating material, and wherein an optical contrast between the first and second grating materials is greater than an optical contrast between the second grating material and the insulator layer.

A method for determining a characteristic of a feature in an object, the feature being disposed below a surface of the object is disclosed. The surface of the object is irradiated with a pulsed pump radiation beam so as to produce an acoustic wave in the object. The surface of the object is then irradiated with a measurement radiation beam. A portion of the measurement radiation beam scattered from the surface is received and a characteristic of the feature in the object is determined from at least a portion of the measurement radiation beam scattered from the surface within a measurement time period. A temporal intensity distribution of the pulsed pump radiation beam is selected such that in the measurement time period a signal to background ratio is greater than a signal to background ratio achieved using a single pulse of the pulsed pump radiation beam. The signal to background ratio is a ratio of: (a) signals generated at the surface by reflections of acoustic waves from the feature to (b) background signals generated at the surface by reflections of acoustic waves which have not reflected from the feature.

A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.

A system comprises a topography measurement system configured to determine a respective height for each of a plurality of locations on a substrate; and a processor configured to: determine a height map for the substrate based on the determined heights for the plurality of locations; and determine at least one alignment parameter for the substrate by comparing the height map and a reference height map, wherein the reference height map comprises or represents heights for a plurality of locations on a reference substrate portion.

Embodiments of the disclosure provides an apparatus for aligning layers of an integrated circuit (IC), the apparatus including: an insulator layer positioned above a semiconductor substrate; a first diffraction grating within a first region of the insulator layer, the first diffraction grating including a first grating material within the first region of the insulator layer; and a second diffraction grating within a second region of the insulator layer, the second grating including a second grating material within the second region of the insulator layer, wherein the second grating material is different from the first grating material, and wherein an optical contrast between the first and second grating materials is greater than an optical contrast between the second grating material and the insulator layer.