Patent classifications
G05B19/045
Overflow detection and correction in state machine engines
State machine engines are disclosed, including those having an inter-rank bus control system, which may include a register. The state machine engine may include a plurality of configurable elements, such that each of the plurality of configurable elements comprises a plurality of memory cells. These cells may analyze data and output a result of the analysis. The IR bus control system may halt a write operation of data to be analyzed by the cells based, at least in part, on one or more conditions.
Overflow detection and correction in state machine engines
State machine engines are disclosed, including those having an inter-rank bus control system, which may include a register. The state machine engine may include a plurality of configurable elements, such that each of the plurality of configurable elements comprises a plurality of memory cells. These cells may analyze data and output a result of the analysis. The IR bus control system may halt a write operation of data to be analyzed by the cells based, at least in part, on one or more conditions.
METHODS AND DEVICES FOR REDUCING ARRAY SIZE AND COMPLEXITY IN AUTOMATA PROCESSORS
A method includes encoding an input data stream to generate an encoded input data pattern, transmitting the encoded input data pattern to a programmed automata processor, and searching the encoded input data pattern via the programmed automata processor to identify an identifiable data pattern within the encoded input data pattern as a data pattern search.
METHODS AND DEVICES FOR REDUCING ARRAY SIZE AND COMPLEXITY IN AUTOMATA PROCESSORS
A method includes encoding an input data stream to generate an encoded input data pattern, transmitting the encoded input data pattern to a programmed automata processor, and searching the encoded input data pattern via the programmed automata processor to identify an identifiable data pattern within the encoded input data pattern as a data pattern search.
ACTUATING MECHANISM CONTROL METHOD FOR GLASS PLATE TEMPERING PROCESS
An actuating mechanism control method for a glass plate tempering process, comprising: after a glass plate is conveyed into a heating furnace, a monitoring unit monitors in real time energy consumed by a heating element of the heating furnace, and sends the energy consumed to a control unit to compare with a set threshold; and when the energy consumed by the heating element of the heating furnace is greater than or equal to the set threshold, the control unit sends an instruction to an actuating mechanism to control actions of the actuating mechanism to complete a corresponding tempering process procedure. Through the method that the monitoring unit monitors in real time the energy consumed by the heating element of the heating furnace, a heating procedure of the glass plate is more scientifically and precisely controlled, and, therefore, a discharging moment of the glass plate can be accurately determined.
ACTUATING MECHANISM CONTROL METHOD FOR GLASS PLATE TEMPERING PROCESS
An actuating mechanism control method for a glass plate tempering process, comprising: after a glass plate is conveyed into a heating furnace, a monitoring unit monitors in real time energy consumed by a heating element of the heating furnace, and sends the energy consumed to a control unit to compare with a set threshold; and when the energy consumed by the heating element of the heating furnace is greater than or equal to the set threshold, the control unit sends an instruction to an actuating mechanism to control actions of the actuating mechanism to complete a corresponding tempering process procedure. Through the method that the monitoring unit monitors in real time the energy consumed by the heating element of the heating furnace, a heating procedure of the glass plate is more scientifically and precisely controlled, and, therefore, a discharging moment of the glass plate can be accurately determined.
Circuit Architecture Mapping Signals to Functions for State Machine Execution
An integrated circuit includes a memory configured to store a plurality of functions; a mapping interface configured to perform a mapping from a received first signal to a first function of the plurality of functions; and a state machine configured to, in response to said mapping, execute the first function; wherein the integrated circuit is arranged to, in dependence on the execution of the first function at the state machine, modify said mapping between the first signal and the first function so as to re-map the first signal to a second function of the plurality of functions such that, on receiving a subsequent first signal, the state machine is configured to execute the second function.
Circuit Architecture Mapping Signals to Functions for State Machine Execution
An integrated circuit includes a memory configured to store a plurality of functions; a mapping interface configured to perform a mapping from a received first signal to a first function of the plurality of functions; and a state machine configured to, in response to said mapping, execute the first function; wherein the integrated circuit is arranged to, in dependence on the execution of the first function at the state machine, modify said mapping between the first signal and the first function so as to re-map the first signal to a second function of the plurality of functions such that, on receiving a subsequent first signal, the state machine is configured to execute the second function.
HEIGHT-ADJUSTABLE TABLE
The present invention relates to an improved height-adjustable table (1) which can assist and motivate the user to use the height-adjustable table in a manner which increases health, calorie burn and well-being. The table features a communication interface for connection of a user specific device providing the control with a set of user values for that specific guest user of the height-adjustable table in order to ease the configuration of the table to fit each individual user.
Program editing device, program editing method, and computer readable medium
An inter-variable dependency analyzing unit analyzes a relation between an argument and a return value between instructions of a plurality of instructions included in a sequence control program, which is a control program written in a language for sequence control. A PLC instruction sorting/division unit at least either changes an instruction execution order of the plurality of instructions or divides the sequence control program in units of instructions, based on the relation between the argument and the return value between the instructions analyzed by the inter-variable dependency analyzing unit.