An image sensor comprises: an array (102) of pixels (104) arranged in rows and columns; readout circuitry (110) for reading out image information from pixels (104) in the array (102) of pixels (104); signal lines (112) for providing control signals to the pixels (104) in the array (102) and/or the readout circuitry (110); a programmable sequence controller (114) configured to control the control signals provided on the signal lines (112), said programmable sequence controller (114) comprising: at least one programmable signal controlling state machine (140), which is configured to define a sequence of states and to define control parameters for the states in the sequence, wherein the control parameters include the control signals to be provided on at least one signal line (112) for controlling at least one of a row of pixels (104) or the readout circuitry (110).

An image sensor comprises: an array (102) of pixels (104) arranged in rows and columns; readout circuitry (110) for reading out image information from pixels (104) in the array (102) of pixels (104); signal lines (112) for providing control signals to the pixels (104) in the array (102) and/or the readout circuitry (110); a programmable sequence controller (114) configured to control the control signals provided on the signal lines (112), said programmable sequence controller (114) comprising: at least one programmable signal controlling state machine (140), which is configured to define a sequence of states and to define control parameters for the states in the sequence, wherein the control parameters include the control signals to be provided on at least one signal line (112) for controlling at least one of a row of pixels (104) or the readout circuitry (110).

Digital systems formed on integrated circuits may include sequential logic circuitry. The sequential logic circuitry may form at least part of a finite state machine that records different logical states. The sequential logic circuitry may include a first latching circuit and a second latching circuit that each latch bits onto their respective outputs when clocked at different levels. The first latching circuit may output a first bit. Combinational logic circuitry may be distributed on both sides of the first latching circuit such that a combinational logic circuit interposed between the first and second latching circuits generates a second bit based on at least the first bit. The first and second bits may record one of two possible finite logical states of the sequential logic circuitry. By distributing combinational logic circuity on two sides of a given latching circuit, dynamic power consumption by the sequential logic circuitry may be optimized.

Digital systems formed on integrated circuits may include sequential logic circuitry. The sequential logic circuitry may form at least part of a finite state machine that records different logical states. The sequential logic circuitry may include a first latching circuit and a second latching circuit that each latch bits onto their respective outputs when clocked at different levels. The first latching circuit may output a first bit. Combinational logic circuitry may be distributed on both sides of the first latching circuit such that a combinational logic circuit interposed between the first and second latching circuits generates a second bit based on at least the first bit. The first and second bits may record one of two possible finite logical states of the sequential logic circuitry. By distributing combinational logic circuity on two sides of a given latching circuit, dynamic power consumption by the sequential logic circuitry may be optimized.

A device having a clean status indicator system having a frame with a base, a plurality of feet, a washing compartment, a door, and at least one rack. The system includes a weight sensor secured to one of the feet; a tilt switch for indicating if the dishwasher is tilted; a temperature sensor; a housing, and a visual display. A controller having a control logic communicates with a power supply, the weight sensor, the tilt switch, the temperature sensor, and the visual display. The controller is configured to receive data from the weight sensor, the tilt switch, and the temperature sensor and analyze the data from the weight sensor, the tilt switch, and the temperature sensor. The tilt switch is mounted exterior to the dishwasher and configured to be activated or deactivated when the dishwasher is a tilted forward.

A device having a clean status indicator system having a frame with a base, a plurality of feet, a washing compartment, a door, and at least one rack. The system includes a weight sensor secured to one of the feet; a tilt switch for indicating if the dishwasher is tilted; a temperature sensor; a housing, and a visual display. A controller having a control logic communicates with a power supply, the weight sensor, the tilt switch, the temperature sensor, and the visual display. The controller is configured to receive data from the weight sensor, the tilt switch, and the temperature sensor and analyze the data from the weight sensor, the tilt switch, and the temperature sensor. The tilt switch is mounted exterior to the dishwasher and configured to be activated or deactivated when the dishwasher is a tilted forward.

A sequence generating apparatus that generates a sequence representing a state transition of an object, includes input unit configured to input an initial state of the object in a sequence to be generated; setting unit configured to set an end state of the object in the sequence to be generated; generating unit configured to generate a plurality of sequences using a predetermined prediction model on the basis of the initial state; and output unit configured to output at least one of the plurality of sequences, the at least one sequence matching the end state.

A sequence generating apparatus that generates a sequence representing a state transition of an object, includes input unit configured to input an initial state of the object in a sequence to be generated; setting unit configured to set an end state of the object in the sequence to be generated; generating unit configured to generate a plurality of sequences using a predetermined prediction model on the basis of the initial state; and output unit configured to output at least one of the plurality of sequences, the at least one sequence matching the end state.

An inter-variable dependency analyzing unit (310) analyzes a relation between an argument and a return value between instructions of a plurality of instructions included in a sequence control program, which is a control program written in a language for sequence control. A PLC instruction sorting/division unit (312) at least either changes an instruction execution order of the plurality of instructions or divides the sequence control program in units of instructions, based on the relation between the argument and the return value between the instructions analyzed by the inter-variable dependency analyzing unit (310).

An information processing apparatus, information processing method, and computer readable storage medium are provided. An information processing apparatus (200) for generating a safety program for causing output devices to operate such that safety is maintained if a predetermined condition is satisfied includes: an acquisition unit acquiring an input/output setting (230) that correlates respective input devices with output devices that respond to changes in values of input signals from the input devices from a first input value that is an initial value to a second input value; and a generation unit generating, in a case in which a value of an input signal from any of the input devices defined in the input/output setting (230) has changed from the first input value to the second input value, a safety program for shifting an operation state of an output device correlated with the input device to a safety state.