G05B2219/34024

SELECTING HARDWARE ACCELERATORS BASED ON SCORE

Hardware accelerators are scored according to various metrics and attributes that characterize the accelerators. Examples of suitable accelerator scoring criteria include whether the software simulation of the accelerator is complete, whether hardware testing is complete, whether the accelerator is currently deployed, the number of times the accelerator has been deployed to a private cloud, the number of times the accelerator has been deployed to a public cloud, ratings by users, number of failures, number of executions, space utilization and efficiency, code metrics, power consumption, speed, and image characteristics, including space used, resources used, use of dedicated functions on a programmable device, etc. These accelerator scoring criteria are tracked for each accelerator in an accelerator scoring catalog. When an accelerator is needed, accelerator selection criteria is specified and compared with the accelerator scoring criteria in the accelerator scoring catalog to locate one or more accelerators that satisfy the accelerator selection criteria.

Positioning System, Method, And Stage Serial Interface Board
20190056710 · 2019-02-21 ·

Disclosed is a positioning system having at least one axis of movement and a serial interface board and method for use therewith. The system includes at least one controller and at least one positioning stage. The at least one positioning stage is in communication with the at least one controller and includes a first positioning stage. The first positioning stage includes a first carriage and a first motor configured to displace the first carriage along a first positioning axis or rotate the first carriage about the first positioning axis. The first positioning stage also includes a first serial interface that is configured to connect to a source of power and receive first-stage sensor signals from one or more stage sensors associated with the first positioning stage. The first serial interface is also configured to communicate at least a portion of the first-stage sensor signals to the at least one controller.

FPGA Functionality Mode Switch-Over

In an embodiment of the invention, an apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; a field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA; wherein the apparatus triggers a switch of an FPGA image in the FPGA to another FPGA image. In another embodiment of the invention, a method comprises: triggering, by an apparatus, a switch of an FPGA image in a field programmable gate array (FPGA) to another FPGA image; herein the apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; the field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA. In yet another embodiment of the invention, an article of manufacture comprises a non-transitory computer-readable medium having stored thereon instructions operable to permit an apparatus to perform a method comprising: triggering, by the apparatus, a switch of an FPGA image in a field programmable gate array (FPGA) to another FPGA image, wherein the apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; the field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA.

Electro-hydraulic servo valve control system

A control system includes an electro-hydraulic servo valve configured to move about a plurality of positions in response to receiving an analog bi-polar current signal. An electronic field programmable gate array (FPGA) generates first and second digital pulse width modulation (PWM) signals according to an adjustable duty cycle. An electronic bridge circuit is in electrical communication with the FPGA to convert the first and second digital PWM signals into the bi-polar current signal. An electronic current sensing circuit is in electrical communication with the bridge circuit, the current sensing circuit configured to generate a digital feedback signal indicating an average current level of the bi-polar signal. The FPGA controls the duty cycle based on at least the average current level indicated by the digital feedback signal.

METHOD APPARATUS FOR HIGH-LEVEL PROGRAMS WITH GENERAL CONTROL FLOW
20170294913 · 2017-10-12 ·

A method of configuring a programmable integrated circuit device to implement control flow at a current basic block. A branch selector node within the current basic block is configured to receive at least one control signal, where each of the at least one control signal is associated with a respective previous basic block. The branch selector node is further configured to select one of the at least one control signal based on one or more intended destinations for the at least one control signal, and provide the selected control signal to a data selector node within the current basic block. The data selector node is configured to select a data signal based on the selected control signal, where the selected data signal is from the respective previous basic block that is associated with the selected control signal.

Method and apparatus for high-level programs with general control flow
09690278 · 2017-06-27 · ·

A method of configuring a programmable integrated circuit device to implement control flow at a current basic block. A branch selector node within the current basic block is configured to receive at least one control signal, where each of the at least one control signal is associated with a respective previous basic block. The branch selector node is further configured to select one of the at least one control signal based on one or more intended destinations for the at least one control signal, and provide the selected control signal to a data selector node within the current basic block. The data selector node is configured to select a data signal based on the selected control signal, where the selected data signal is from the respective previous basic block that is associated with the selected control signal.

Electromagnetic immunity test system and control method thereof

An electromagnetic immunity test system includes a data acquisition and control device, a linear module, an electromagnetic disturbance simulator, and an upper computer. The data acquisition and control device is in a data connection to the linear module, the electromagnetic disturbance simulator, and the upper computer. The linear module includes a grating ruler; and the linear module is disposed on the numerical control machine tool to measure location data of the sliding table of the numerical control machine tool and transmit the location data to the data acquisition and control device. The electromagnetic disturbance simulator is configured to generate and transmit an electromagnetic signal to the numerical control system. The data acquisition and control device is configured to read the location data in real time and transfer the real-time location data to the upper computer.