A method includes receiving, into a measurement tool, a substrate having a material feature, wherein the material feature is formed on the substrate according to a design feature. The method further includes applying a source signal on the material feature, collecting a response signal from the material feature by using the measurement tool, and with a computer connected to the measurement tool, calculating a simulated response signal from the design feature. The method further includes, with the computer, in response to determining that a difference between the collected response signal and the simulated response signal exceeds a predetermined value, causing the measurement tool to re-measure the material feature.

A method of controlling a computer process for designing or verifying a photolithographic component includes building a source tree including nodes of the process, including dependency relationships among the nodes, defining, for some nodes, at least two different process conditions, expanding the source tree to form an expanded tree, including generating a separate node for each different defined process condition, and duplicating dependent nodes having an input relationship to each generated separate node, determining respective computing hardware requirements for processing the node, selecting computer hardware constraints based on capabilities of the host computing system, determining, based on the requirements and constraints and on dependency relations in the expanded tree, an execution sequence for the computer process, and performing the computer process on the computing system.

A computer device is programmed to store a model for converting shape maps to simulate a portion of an assembly line, receive scan data of a first inspection of a product being assembled, generate a shape map from the scan data of the first inspection, execute the model using the shape map as an input to generate a final shape map of the product, compare the final shape map to one or more thresholds, determine if the final shape map exceeds at least one of the one or more thresholds, and if the determination is that the final shape map exceeds at least one of the one or more thresholds, cause the first device to be adjusted.

A method includes having a first wafer bonding recipe and a model of a wafer bonding process, the model comprising an input indicative of a physical parameter of a first wafer to be bonded to a second wafer and configured to output a wafer bonding recipe based on the physical parameter of the first wafer; obtaining measurements of the first wafer to obtain the physical parameter of the first wafer; generating, by the model, the first wafer bonding recipe based on the physical parameter of the first wafer; and bonding the first wafer to the second wafer in accordance with the first wafer bonding recipe to produce a first post-bond wafer.

This method includes a step of imaging, by an imaging apparatus in a substrate treatment system, a reference substrate which is a reference for condition setting and acquiring a captured image of the reference substrate; and a step of imaging, by the imaging apparatus, a treated substrate on which the predetermined treatment has been performed under a current treatment condition and acquiring a captured image of the treated substrate. A deviation amount in color information between the captured image of the treated substrate and the captured image of the reference substrate is calculated. A correction amount of the treatment condition is calculated based on a correlation model acquired in advance and on the deviation amount in the color information. Also included is a step of setting the treatment condition based on the correction amount and performing the treatment on a target substrate based on the set treatment condition.

A method of manufacturing a semiconductor device includes defining a sampling plan in a process control system. Measurement values are obtained at the first number N of the sample points. The first number of measurement values are modelled using a wafer model to generate a first set of coefficients according to a reference model. A second number M of the first number N of sample points is randomly selected. The second number M of measurement values obtained at the second number M of sample points is modelled using the wafer model to generate a second set of coefficients according to a phase_1 model. One of the M sample points is randomly replaced by one of the N−M sample points to obtain a subsample. The measurement values of the subsample are modelled using the wafer model to generate a third set of coefficients according to a phase_2 model.

A method includes having a first wafer bonding recipe and a model of a wafer bonding process, the model comprising an input indicative of a physical parameter of a first wafer to be bonded to a second wafer and configured to output a wafer bonding recipe based on the physical parameter of the first wafer; obtaining measurements of the first wafer to obtain the physical parameter of the first wafer; generating, by the model, the first wafer bonding recipe based on the physical parameter of the first wafer; and bonding the first wafer to the second wafer in accordance with the first wafer bonding recipe to produce a first post-bond wafer.

A method of controlling a computer process for designing or verifying a photolithographic component, the method including building a source tree including nodes of the process, including dependency relationships among the nodes, defining, for some nodes, at least two different process conditions, expanding the source tree to form an expanded tree, including generating a separate node for each different defined process condition, and duplicating dependent nodes having an input relationship to each generated separate node, determining respective computing hardware requirements for processing the node, selecting computer hardware constraints based on capabilities of the host computing system, determining, based on the requirements and constraints and on dependency relations in the expanded tree, an execution sequence for the computer process, and performing the computer process on the computing system.

Provided is a manufacturing support system capable of manufacturing an optoelectronic device with a low cost and a high yield rate and also achieving improved characteristics. The system is constituted by an inspection apparatus and a server. The inspection apparatus outputs to the server results obtained by performing defect inspections in a plurality of steps different from each other that may relate to the occurrence of defect determining a defective item in a primary process of device manufacturing. In the server, defect inspection result acquisition units acquire inspection results in respective steps, and a database separately stores the inspection results of the respective steps. By comparing defect information included in the inspection results obtained in the plurality of steps and the reference information indicating an inspection result of the normal state, a data processing control unit of the server determines whether an identical defect is indicated.

Anomaly detection and remedial recommendation techniques for improving the quality and yield of microelectronic products are provided. In one aspect, a method for quality and yield improvement via anomaly detection includes: collecting time series sensor data during individual steps of a semiconductor manufacturing process; calculating anomaly scores for each of the individual steps using a predictive model; and implementing changes to the semiconductor manufacturing process based on the anomaly scores. A system for quality and yield improvement via anomaly detection is also provided.