Provided is a circuit structure for suppressing surge current, which includes a surge current suppression judgment circuit, a switching control circuit and a self-boosting regulating circuit. An output end of the surge current suppression judgment circuit is connected with the switching control circuit. An output end of the switching control circuit is connected with the self-boosting regulating circuit. The switching control circuit and the self-boosting regulating circuit are both connected with a current input end Vin. An output end of the self-boosting regulating circuit is connected with an input end of the surge current suppression judgment circuit. The output end of the self-boosting regulating circuit is an output end Vout of the whole circuit structure for suppressing surge current.

A voltage regulator can include: an input port with two terminals, and being configured to receive an input voltage; an output port with two terminals, and being configured to generate an output voltage, where the input port and the output port have a common ground potential; a group of input switches coupled in series between the two terminals of the input port, where a common node of every two adjacent input switches that form an input half-bridge topology is taken as an input switch node; at least one output half-bridge topology coupled between two terminals of the output port, where a common node of a high-side output switch and a low-side output switch in each output half-bridge topology is taken as an output switch node; and N storage capacitors, where each of the storage capacitors is coupled between one input switch node and one output switch node.

A voltage regulator can include: an input port with two terminals, and being configured to receive an input voltage; an output port with two terminals, and being configured to generate an output voltage, where the input port and the output port have a common ground potential; a group of input switches coupled in series between the two terminals of the input port, where a common node of every two adjacent input switches that form an input half-bridge topology is taken as an input switch node; at least one output half-bridge topology coupled between two terminals of the output port, where a common node of a high-side output switch and a low-side output switch in each output half-bridge topology is taken as an output switch node; and N storage capacitors, where each of the storage capacitors is coupled between one input switch node and one output switch node.

This disclosure describes a gate driver with voltage boosting capabilities. In some embodiments, the gate driver may comprise a charge pump that includes capacitor(s) and switch(es). Responsive a logic low input signal, the gate driver may bypass the capacitor(s) to allow the input digital signal to drive the gating signal directly. Conversely, responsive to a logic high input signal, the gate driver may couple the capacitor(s) in series with the input digital signal to generate a boosted gating signal. In some embodiments, the gate driver may comprise an inductor-capacitor resonant circuit to create a doubled output gating signal with respect to the input digital signal. In some embodiments, the resonant gate driver may include an additional voltage boosting capability that can be selectively enabled to compensate for a voltage drop during the signal transfer from the input to the output.

An alternating-current (AC) voltage regulator configured to receive an input voltage. The regulator including an AC/DC pulse-width modulated (PWM) power supply configured to receive the input voltage and output a direct-current (DC) signal isolated from the input voltage. The regulator including a control circuit configured to receive a portion of the input voltage, adjust an amplitude and a phase of the portion of the input voltage, and output the adjusted voltage. The regulator including an amplifier configured to receive, via an power input, the isolated DC signal; receive, via a first input, the adjusted voltage; receive a feedback loop from an amplifier output to a second input; and output, via the amplifier output, a differential signal. The regulator including an output configured to add the differential signal to the input voltage resulting in a regulated voltage, and output the regulated voltage.

An electronic circuit includes a switched-mode power supply powering a first load via a first linear voltage regulator. The first regulator includes a transistor. The substrate and the gate of the transistor are capable of being coupled to a node of application of a power supply voltage. A method of operating the circuit is also disclosed.

An electronic circuit includes a switched-mode power supply powering a first load via a first linear voltage regulator. The first regulator includes a transistor. The substrate and the gate of the transistor are capable of being coupled to a node of application of a power supply voltage. A method of operating the circuit is also disclosed.

A semiconductor device that can perform voltage monitoring with a small circuit area is provided. The resistive subdivision circuit RDIV performs the resistive subdivision of the input voltage Vin by means of the input ladder resistor (R1-R4), and drives the nMOS transistors MN1-MN3 by the subdivided input voltages Vi1-Vi3 each having different resistive subdivision ratios, respectively. The pMOS transistor MP0 is provided in common for the pMOS transistors MP1-MP3, and configures a current mirror circuit with each of the pMOS transistors MP1-MP3. The bias current generating circuit IBSG supplies a bias current to the pMOS transistor MP1.

A power controller for an electrical load is disclosed. The power controller includes a power stage operable to selectively provide an output voltage to the load. An input voltage generator supplies an input voltage to the power stage. A hysteretic comparator is operable to compare a reference voltage to a feedback output voltage from the load, the feedback output voltage being at least a portion of the output voltage, and provide a hysteretic comparator output to the power stage which controls the output voltage. A synthesizing circuit is operable to generate a synthesized voltage and couple the synthesized voltage with the feedback output voltage before the feedback output voltage is compared with the reference voltage by the hysteretic comparator. Coupling of the synthesized voltage with the feedback output voltage synchronizes the hysteretic comparator output with the input voltage provided to the power stage.

A power controller for an electrical load is disclosed. The power controller includes a power stage operable to selectively provide an output voltage to the load. An input voltage generator supplies an input voltage to the power stage. A hysteretic comparator is operable to compare a reference voltage to a feedback output voltage from the load, the feedback output voltage being at least a portion of the output voltage, and provide a hysteretic comparator output to the power stage which controls the output voltage. A synthesizing circuit is operable to generate a synthesized voltage and couple the synthesized voltage with the feedback output voltage before the feedback output voltage is compared with the reference voltage by the hysteretic comparator. Coupling of the synthesized voltage with the feedback output voltage synchronizes the hysteretic comparator output with the input voltage provided to the power stage.