An electronic converter has first and second input terminals, first and second output terminals, a current regulator circuit arranged between the first input terminal and an intermediate node, and input capacitor arranged between the intermediate node and the second input terminal, and an output capacitor. A control circuit block is configured to sense an input voltage, compare the regulated voltage to a reference value and generate a first signal, compare the input voltage to a lower threshold and an upper threshold and generate a second signal, switch the electronic converter between an active mode and an idle mode as a function of the first signal, and switch the electronic converter between a recharge phase and a switching phase as a function of the second signal when the electronic converter is in the active mode.

An electronic converter has first and second input terminals, first and second output terminals, a current regulator circuit arranged between the first input terminal and an intermediate node, and input capacitor arranged between the intermediate node and the second input terminal, and an output capacitor. A control circuit block is configured to sense an input voltage, compare the regulated voltage to a reference value and generate a first signal, compare the input voltage to a lower threshold and an upper threshold and generate a second signal, switch the electronic converter between an active mode and an idle mode as a function of the first signal, and switch the electronic converter between a recharge phase and a switching phase as a function of the second signal when the electronic converter is in the active mode.

An electronic converter has first and second input terminals, first and second output terminals, a current regulator circuit arranged between the first input terminal and an intermediate node, and input capacitor arranged between the intermediate node and the second input terminal, and an output capacitor. A control circuit block is configured to sense an input voltage, compare the regulated voltage to a reference value and generate a first signal, compare the input voltage to a lower threshold and an upper threshold and generate a second signal, switch the electronic converter between an active mode and an idle mode as a function of the first signal, and switch the electronic converter between a recharge phase and a switching phase as a function of the second signal when the electronic converter is in the active mode.

An electronic converter has first and second input terminals, first and second output terminals, a current regulator circuit arranged between the first input terminal and an intermediate node, and input capacitor arranged between the intermediate node and the second input terminal, and an output capacitor. A control circuit block is configured to sense an input voltage, compare the regulated voltage to a reference value and generate a first signal, compare the input voltage to a lower threshold and an upper threshold and generate a second signal, switch the electronic converter between an active mode and an idle mode as a function of the first signal, and switch the electronic converter between a recharge phase and a switching phase as a function of the second signal when the electronic converter is in the active mode.

A DC-DC switching converter with an LC output filter has a switched capacitor converter providing the capacitance of the output filter. The switched capacitor converter may be a multi-phase switched capacitor converter. Topology of connections between capacitors of the multi-phase switched capacitor converter may be dependent on phases of clock signal(s) provided to the multi-phase switched capacitor converter. The switched capacitor converter may rely on parasitic inductances, or include discrete inductors, in series between connected capacitors to allow for adiabatic or near adiabatic voltage conversion.

A DC-DC switching converter with an LC output filter has a switched capacitor converter providing the capacitance of the output filter. The switched capacitor converter may be a multi-phase switched capacitor converter. Topology of connections between capacitors of the multi-phase switched capacitor converter may be dependent on phases of clock signal(s) provided to the multi-phase switched capacitor converter. The switched capacitor converter may rely on parasitic inductances, or include discrete inductors, in series between connected capacitors to allow for adiabatic or near adiabatic voltage conversion.

A CAN transceiver including a data transmission port, a high-side bus port, a low-side bus port, an output stage circuit, a first regulation circuit and a second regulation circuit. The first regulation circuit and the second regulation circuit eliminate errors of differential signals by receiving abnormal voltage signals and outputting regulation signals to increase a pull-up current or a pull-down current in the output circuit, the first regulation circuit regulates errors generated by abnormal positive high-voltage pulses coupled into the high-side bus port, and the second regulation circuit regulates errors generated by abnormal negative high-voltage pulses coupled into the low-side bus port; after the CAN transceiver applies the first regulation circuit and the second regulation circuit, influence of abnormal high-voltage pulse signals in a CAN bus on errors of output signals of the CAN transceiver is reduced, and EMC performance of the CAN transceiver is improved.

A CAN transceiver including a data transmission port, a high-side bus port, a low-side bus port, an output stage circuit, a first regulation circuit and a second regulation circuit. The first regulation circuit and the second regulation circuit eliminate errors of differential signals by receiving abnormal voltage signals and outputting regulation signals to increase a pull-up current or a pull-down current in the output circuit, the first regulation circuit regulates errors generated by abnormal positive high-voltage pulses coupled into the high-side bus port, and the second regulation circuit regulates errors generated by abnormal negative high-voltage pulses coupled into the low-side bus port; after the CAN transceiver applies the first regulation circuit and the second regulation circuit, influence of abnormal high-voltage pulse signals in a CAN bus on errors of output signals of the CAN transceiver is reduced, and EMC performance of the CAN transceiver is improved.